[prev in list] [next in list] [prev in thread] [next in thread]
List: theora-dev
Subject: Re: [theora-dev] theora encoder reordering,
From: Mike Melanson <mike () multimedia ! cx>
Date: 2011-03-01 15:32:03
Message-ID: 4D6D1173.9020004 () multimedia ! cx
[Download RAW message or body]
On 03/01/2011 05:48 AM, digital design wrote:
> Good day!
> I'm creating HDL IP CORE (for using in FPGA) for theora encoder (now
> only I-frames).
> I don't undestand one moment. Now i develop such stages:
> 1. From RBG(byer) to YCbCr converter
> 2. DCT processing (8x8 pixels blocks)
> 3. Quantizator of DCT coeff.
> 4. Zig-Zag of quantized DCT coeff.
> and now i have uresolved last stage of compression - how i must send 8x8
> blocks to huffman compressor? I don't understand ordering.
> I must send all DC coeff (Y, than Cb,Cr), after all AC-0 (Y, than Cb,Cr)
> .... after all AC-63 (Y, than Cb,Cr)? And put huffman compression result
> to buffer memory like this:
> huffman compression products of all DC coeff (Y, than Cb,Cr), after all
> AC-0 (Y, than Cb,Cr) .... after all AC-63 (Y, than Cb,Cr)?
>
> Please explain me this moment. I need your help.
That's most of it. But did you differentially encode the DC
coefficients? And did you Huffman-code in a Hilbert order? Those are 2
steps notably absent from your description.
--
-Mike Melanson
_______________________________________________
theora-dev mailing list
theora-dev@xiph.org
http://lists.xiph.org/mailman/listinfo/theora-dev
[prev in list] [next in list] [prev in thread] [next in thread]
Configure |
About |
News |
Add a list |
Sponsored by KoreLogic