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List:       qemu-riscv
Subject:    Re: [PATCH 4/4] target/riscv: Remove redundant assignment to SXL
From:       Daniel Henrique Barboza <dbarboza () ventanamicro ! com>
Date:       2023-05-30 20:28:24
Message-ID: 0b5ea8ce-48fe-22b8-7247-90d8fe727b1d () ventanamicro ! com
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On 5/29/23 09:17, Weiwei Li wrote:
> SXL is initialized as env->misa_mxl which is also the mxl value.
> So we can just remain it unchanged to keep it read-only.
> 
> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
> ---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   target/riscv/csr.c | 4 ----
>   1 file changed, 4 deletions(-)
> 
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 6ac11d1f11..25345f3153 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -1321,10 +1321,6 @@ static RISCVException write_mstatus(CPURISCVState *env, int csrno,
>   
>       mstatus = (mstatus & ~mask) | (val & mask);
>   
> -    if (xl > MXL_RV32) {
> -        /* SXL field is for now read only */
> -        mstatus = set_field(mstatus, MSTATUS64_SXL, xl);
> -    }
>       env->mstatus = mstatus;
>   
>       /*

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