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List:       qemu-devel
Subject:    Re: [PATCH 2/3] target/hppa: Replace c with uv in do_cond
From:       Helge Deller <deller () gmx ! de>
Date:       2024-03-26 9:47:25
Message-ID: 1c6c0af6-5719-45f0-af05-1748113ca09f () gmx ! de
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On 3/26/24 07:44, Richard Henderson wrote:
> Prepare for proper indication of shladd unsigned overflow.
> The UV indicator will be zero/not-zero instead of a single bit.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Helge Deller <deller@gmx.de>
Tested-by: Helge Deller <deller@gmx.de>

Helge

> ---
>   target/hppa/translate.c | 12 +++++-------
>   1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index a70d644c0b..9d31ef5764 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -707,7 +707,7 @@ static bool cond_need_cb(int c)
>    */
>
>   static DisasCond do_cond(DisasContext *ctx, unsigned cf, bool d,
> -                         TCGv_i64 res, TCGv_i64 cb_msb, TCGv_i64 sv)
> +                         TCGv_i64 res, TCGv_i64 uv, TCGv_i64 sv)
>   {
>       DisasCond cond;
>       TCGv_i64 tmp;
> @@ -754,14 +754,12 @@ static DisasCond do_cond(DisasContext *ctx, unsigned cf, bool d,
>           }
>           cond = cond_make_0_tmp(TCG_COND_EQ, tmp);
>           break;
> -    case 4: /* NUV / UV      (!C / C) */
> -        /* Only bit 0 of cb_msb is ever set. */
> -        cond = cond_make_0(TCG_COND_EQ, cb_msb);
> +    case 4: /* NUV / UV      (!UV / UV) */
> +        cond = cond_make_0(TCG_COND_EQ, uv);
>           break;
> -    case 5: /* ZNV / VNZ     (!C | Z / C & !Z) */
> +    case 5: /* ZNV / VNZ     (!UV | Z / UV & !Z) */
>           tmp = tcg_temp_new_i64();
> -        tcg_gen_neg_i64(tmp, cb_msb);
> -        tcg_gen_and_i64(tmp, tmp, res);
> +        tcg_gen_movcond_i64(TCG_COND_EQ, tmp, uv, ctx->zero, ctx->zero, res);
>           if (!d) {
>               tcg_gen_ext32u_i64(tmp, tmp);
>           }


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