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List:       openocd-development
Subject:    [PATCH]: a925af7086 target: aarch64: access reg ESR_EL1 only in EL1, EL2 and EL3
From:       gerrit () openocd ! org
Date:       2024-05-14 12:52:35
Message-ID: 20240514125235.251711CC () openocd ! org
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This is an automated email from Gerrit.

"Antonio Borneo <borneo.antonio@gmail.com>" just uploaded a new patch set to Gerrit, \
which you can find at https://review.openocd.org/c/openocd/+/8275

-- gerrit

commit a925af7086ec89a4e653f7b8dbb26e2a11afd508
Author: Antonio Borneo <borneo.antonio@gmail.com>
Date:   Tue May 14 14:23:07 2024 +0200

    target: aarch64: access reg ESR_EL1 only in EL1, EL2 and EL3
    
    The register ESR_EL1 is accessible and it's content is relevant
    only when the target is in EL1 or EL2 or EL3.
    Plus, the register is 64 bits wide.
    
    Without this patch, an error:
            Error: Opcode 0xd5385200, DSCR.ERR=1, DSCR.EL=1
    is triggered by GDB register window or through GDB command
            x/p $ESR_EL1
    or through OpenOCD command
            reg ESR_EL1
    
    Detect the EL and return error if the register cannot be accessed.
    Handle the register as 64 bits.
    
    Change-Id: Icd65470c279e5cfd03091db6435cdaa1c447644c
    Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>

diff --git a/src/target/armv8.c b/src/target/armv8.c
index 1767470138..14b1726892 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -342,9 +342,13 @@ static int armv8_read_reg(struct armv8_common *armv8, int \
regnum, uint64_t *regv  ARMV8_MRS(SYSTEM_ELR_EL3, 0), &value_64);
 		break;
 	case ARMV8_ESR_EL1:
-		retval = dpm->instr_read_data_r0(dpm,
-				ARMV8_MRS(SYSTEM_ESR_EL1, 0), &value);
-		value_64 = value;
+		if (curel < SYSTEM_CUREL_EL1) {
+			LOG_DEBUG("ESR_EL1 not accessible in EL%u", curel);
+			retval = ERROR_FAIL;
+			break;
+		}
+		retval = dpm->instr_read_data_r0_64(dpm,
+				ARMV8_MRS(SYSTEM_ESR_EL1, 0), &value_64);
 		break;
 	case ARMV8_ESR_EL2:
 		if (curel < SYSTEM_CUREL_EL2) {
@@ -495,9 +499,13 @@ static int armv8_write_reg(struct armv8_common *armv8, int \
regnum, uint64_t valu  ARMV8_MSR_GP(SYSTEM_ELR_EL3, 0), value_64);
 		break;
 	case ARMV8_ESR_EL1:
-		value = value_64;
-		retval = dpm->instr_write_data_r0(dpm,
-				ARMV8_MSR_GP(SYSTEM_ESR_EL1, 0), value);
+		if (curel < SYSTEM_CUREL_EL1) {
+			LOG_DEBUG("ESR_EL1 not accessible in EL%u", curel);
+			retval = ERROR_FAIL;
+			break;
+		}
+		retval = dpm->instr_write_data_r0_64(dpm,
+				ARMV8_MSR_GP(SYSTEM_ESR_EL1, 0), value_64);
 		break;
 	case ARMV8_ESR_EL2:
 		if (curel < SYSTEM_CUREL_EL2) {
@@ -1572,7 +1580,7 @@ static const struct {
 
 	{ ARMV8_ELR_EL1, "ELR_EL1", 64, ARMV8_64_EL1H, REG_TYPE_CODE_PTR, "banked", \
"net.sourceforge.openocd.banked",  NULL},
-	{ ARMV8_ESR_EL1, "ESR_EL1", 32, ARMV8_64_EL1H, REG_TYPE_UINT32, "banked", \
"net.sourceforge.openocd.banked", +	{ ARMV8_ESR_EL1, "ESR_EL1", 64, ARMV8_64_EL1H, \
REG_TYPE_UINT64, "banked", "net.sourceforge.openocd.banked",  NULL},
 	{ ARMV8_SPSR_EL1, "SPSR_EL1", 32, ARMV8_64_EL1H, REG_TYPE_UINT32, "banked", \
"net.sourceforge.openocd.banked",  NULL},

-- 


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