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List:       openocd-development
Subject:    [PATCH]: a355772c6a target: aarch64: access reg ELR_EL1 only in EL1, EL2 and EL3
From:       gerrit () openocd ! org
Date:       2024-05-14 12:52:35
Message-ID: 20240514125235.1A7E41B7 () openocd ! org
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This is an automated email from Gerrit.

"Antonio Borneo <borneo.antonio@gmail.com>" just uploaded a new patch set to Gerrit, \
which you can find at https://review.openocd.org/c/openocd/+/8274

-- gerrit

commit a355772c6af6ce4dddf2fc14a998756bee28b720
Author: Antonio Borneo <borneo.antonio@gmail.com>
Date:   Tue May 14 14:17:39 2024 +0200

    target: aarch64: access reg ELR_EL1 only in EL1, EL2 and EL3
    
    The register ELR_EL1 is accessible and it's content is relevant
    only when the target is in EL1 or EL2 or EL3.
    
    Without this patch, an error:
            Error: Opcode 0xd5384020, DSCR.ERR=1, DSCR.EL=1
    is triggered by GDB register window or through GDB command
            x/p $ELR_EL1
    or through OpenOCD command
            reg ELR_EL1
    
    Detect the EL and return error if the register cannot be accessed.
    
    Change-Id: I402dda4cd9dae502b05572fc6c1a8f0edf349bb1
    Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>

diff --git a/src/target/armv8.c b/src/target/armv8.c
index b622dc990e..1767470138 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -315,6 +315,11 @@ static int armv8_read_reg(struct armv8_common *armv8, int \
regnum, uint64_t *regv  value_64 = value;
 		break;
 	case ARMV8_ELR_EL1:
+		if (curel < SYSTEM_CUREL_EL1) {
+			LOG_DEBUG("ELR_EL1 not accessible in EL%u", curel);
+			retval = ERROR_FAIL;
+			break;
+		}
 		retval = dpm->instr_read_data_r0_64(dpm,
 				ARMV8_MRS(SYSTEM_ELR_EL1, 0), &value_64);
 		break;
@@ -463,6 +468,11 @@ static int armv8_write_reg(struct armv8_common *armv8, int \
regnum, uint64_t valu  break;
 	/* registers clobbered by taking exception in debug state */
 	case ARMV8_ELR_EL1:
+		if (curel < SYSTEM_CUREL_EL1) {
+			LOG_DEBUG("ELR_EL1 not accessible in EL%u", curel);
+			retval = ERROR_FAIL;
+			break;
+		}
 		retval = dpm->instr_write_data_r0_64(dpm,
 				ARMV8_MSR_GP(SYSTEM_ELR_EL1, 0), value_64);
 		break;

-- 


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