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List:       openocd-development
Subject:    [OpenOCD-devel] [PATCH]: 44e6459 Fix resume when core state has been modified
From:       gerrit () openocd ! org (gerrit)
Date:       2016-03-21 16:38:27
Message-ID: 20160321163827.2C46A1981049 () mail ! openocd ! org
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This is an automated email from Gerrit.

Matthias Welwarsky (matthias@welwarsky.de) just uploaded a new patch set to Gerrit, \
which you can find at http://openocd.zylin.com/3386

-- gerrit

commit 44e645934811ea92d98d5290804fba943db5b3e3
Author: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Date:   Mon Mar 21 17:30:02 2016 +0100

    Fix resume when core state has been modified
    
    Sometimes it is necessary to resume into a different state (ARM/Thumb)
    than at debug state entry. According to the documentation this should
    be possible with "arm core_state arm|thumb" before the resume command,
    however the original code also restores the original CPSR, which
    overrides whatever state the core was set to. The fix is to use the "BX"
    instruction instead of "MOV pc, r0", which, when executed in debug
    state, sets PC and core state according to the jump address. On exit
    of the debug state, the CPU resumes at PC in the correct state.
    
    Change-Id: Ic03153b4b250fbb8cf6c75f8e329fb34829aa35f
    Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>

diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 5df625f..1bc5ca0 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -231,6 +231,18 @@ static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, \
unsigned regnum)  }
 
 /**
+ * Write to program counter and switch the core state (arm/thumb) according to
+ * the address.
+ */
+static int dpm_write_pc_core_state(struct arm_dpm *dpm, struct reg *r)
+{
+	uint32_t value = buf_get_u32(r->value, 0, 32);
+
+	/* read r0 from DCC; then "BX r0" */
+	return dpm->instr_write_data_r0(dpm, ARMV4_5_BX(0), value);
+}
+
+/**
  * Read basic registers of the the current context:  R0 to R15, and CPSR;
  * sets the core mode (such as USR or IRQ) and state (such as ARM or Thumb).
  * In normal operation this is called on entry to halting debug state,
@@ -467,7 +479,11 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool \
bpwp)  goto done;
 	arm->cpsr->dirty = false;
 
-	retval = dpm_write_reg(dpm, arm->pc, 15);
+	/* restore the PC, make sure to also switch the core state
+	 * to whatever it was set to with "arm core_state" command.
+	 * target code will have set PC to an appropriate resume address.
+	 */
+	retval = dpm_write_pc_core_state(dpm, arm->pc);
 	if (retval != ERROR_OK)
 		goto done;
 	arm->pc->dirty = false;

-- 

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