[prev in list] [next in list] [prev in thread] [next in thread]
List: linux-mips
Subject: Re: [PATCH] cevt-txx9: Reset timer counter on initialize
From: Ralf Baechle <ralf () linux-mips ! org>
Date: 2008-06-28 18:39:14
Message-ID: 20080628183913.GC20127 () linux-mips ! org
[Download RAW message or body]
On Tue, Jun 24, 2008 at 11:26:38PM +0900, Atsushi Nemoto wrote:
> The txx9_tmr_init() will not clear a timer counter register on certain
> case. The counter register is cleared on 1->0 transition of TCE bit
> if CRE=1. So just clearing TCE bit is not enough.
Applied. Thanks, Atsushi-San!
Ralf
[prev in list] [next in list] [prev in thread] [next in thread]
Configure |
About |
News |
Add a list |
Sponsored by KoreLogic