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List:       linux-arm-kernel
Subject:    Re: On TLB flushing
From:       Marc Singer <elf () buici ! com>
Date:       2004-04-16 17:37:05
Message-ID: 20040416173705.GA13736 () flea
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On Fri, Apr 16, 2004 at 05:51:09PM +0100, Russell King - ARM Linux wrote:
> > Let me understand this.  
> > 
> > The kernel has knowingly removed the PTE without flushing the TLB.
> 
> No.  You're looking at it from too low a level.  Take a moment to stand
> back and look at what's happening from a higher level.

Thanks a lot for your comments.  It's difficult to see how this works
without explanation.

Now, I think I know more about what's going on.  I'd have liked to
come to you with a solution, but I'm not sure where to look.

It turns out that try_to_unmap_one () is correctly calling the TLB
flush function...with the wrong virtual address.  The trouble is, I
don't know how this address should be formed.

The call ptep_to_address () looks into the node data and composes an
address.  

    unmap: breakin ptep c0341820 address 00104000
    kmap_atomic_to_page c0235228
    low_bits 00104000
    page->index 00000000

The address value needs to be 0x00008000 for a correct cache and TLB
flush.  I know this is a big question: how is this supposed to work?



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