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List:       linux-arm-kernel
Subject:    Re: On TLB flushing
From:       Robin Farine <robin.farine () terminus ! org>
Date:       2004-04-16 16:54:00
Message-ID: 40800FA8.4040109 () terminus ! org
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This has probably nothing to do with your problem, but just in case ...

Marc Singer wrote:

>I don't think this is true.  Adding a TLB flush eliminates the bug.
>If this were merely a page overwrite problem then I think the TLB
>flush wouldn't fix it.
>  
>

What could happen is that flushing the TLB causes the page contents to 
be reloaded from the file and thus hide another unrelated bug. You could 
have a RAM controller configuration or a hardware problem that causes 
mirroring of a part of your physical address space.

I am thinking about this because, if I remember correctly, you said 
earlier that the problem occurs when you make the whole available RAM 
visible to the kernel but that you did not observe it when you used half 
of it.


Robin


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