Next Last 1. 2020-07-31 [4] [RFC v2 43/76] target/riscv: rvv-0.9: integer extension instructions qemu-riscv Richard Henderson 2. 2020-07-31 [2] [RFC v2 75/76] target/riscv: gdb: support vector registers for rv64 qemu-riscv Richard Henderson 3. 2020-07-31 [2] [RFC v2 72/76] target/riscv: rvv-0.9: narrowing floating-point/integer t qemu-riscv Richard Henderson 4. 2020-07-31 [2] [RFC v2 71/76] target/riscv: rvv-0.9: widening floating-point/integer ty qemu-riscv Richard Henderson 5. 2020-07-31 [2] [RFC v2 67/76] target/riscv: rvv-0.9: remove integer extract instruction qemu-riscv Richard Henderson 6. 2020-07-31 [2] [RFC v2 66/76] target/riscv: rvv-0.9: remove vmford.vv and vmford.vf qemu-riscv Richard Henderson 7. 2020-07-31 [2] [RFC v2 65/76] target/riscv: rvv-0.9: remove widening saturating scaled qemu-riscv Richard Henderson 8. 2020-07-31 [2] [RFC v2 64/76] target/riscv: rvv-0.9: single-width scaling shift instruc qemu-riscv Richard Henderson 9. 2020-07-31 [2] [RFC v2 62/76] target/riscv: rvv-0.9: single-width floating-point reduct qemu-riscv Richard Henderson 10. 2020-07-31 [2] [RFC v2 61/76] target/riscv: rvv-0.9: floating-point/integer type-conver qemu-riscv Richard Henderson 11. 2020-07-31 [2] [RFC v2 60/76] target/riscv: rvv-0.9: narrowing fixed-point clip instruc qemu-riscv Richard Henderson 12. 2020-07-31 [2] [RFC v2 59/76] target/riscv: rvv-0.9: floating-point slide instructions qemu-riscv Richard Henderson 13. 2020-07-31 [2] [RFC v2 58/76] target/riscv: rvv-0.9: slide instructions qemu-riscv Richard Henderson 14. 2020-07-31 [2] [RFC v2 56/76] target/riscv: rvv-0.9: widening integer reduction instruc qemu-riscv Richard Henderson 15. 2020-07-31 [1] [RFC PATCH v2 2/2] hw/riscv: sifive_u: Add write-once protection. qemu-riscv Green Wan 16. 2020-07-31 [1] [RFC PATCH v2 1/2] hw/riscv: sifive_u: Add file-backed OTP. qemu-riscv Green Wan 17. 2020-07-31 [1] [RFC PATCH v2 0/2] Add write-once and file-backed features to OTP qemu-riscv Green Wan 18. 2020-07-30 [2] [RFC v2 53/76] target/riscv: use softfloat lib float16 comparison functi qemu-riscv Richard Henderson 19. 2020-07-30 [2] [RFC v2 51/76] target/riscv: rvv-0.9: integer comparison instructions qemu-riscv Richard Henderson 20. 2020-07-30 [2] [RFC v2 50/76] target/riscv: rvv-0.9: single-width saturating add and su qemu-riscv Richard Henderson 21. 2020-07-30 [2] [RFC v2 49/76] target/riscv: rvv-0.9: quad-widening integer multiply-add qemu-riscv Richard Henderson 22. 2020-07-30 [2] [RFC v2 48/76] target/riscv: rvv-0.9: widening integer multiply-add inst qemu-riscv Richard Henderson 23. 2020-07-30 [2] [RFC v2 47/76] target/riscv: rvv-0.9: narrowing integer right shift inst qemu-riscv Richard Henderson 24. 2020-07-30 [2] [RFC v2 45/76] target/riscv: rvv-0.9: single-width bit shift instruction qemu-riscv Richard Henderson 25. 2020-07-30 [2] [RFC v2 44/76] target/riscv: rvv-0.9: single-width averaging add and sub qemu-riscv Richard Henderson 26. 2020-07-30 [2] [RFC v2 42/76] target/riscv: rvv-0.9: whole register move instructions qemu-riscv Richard Henderson 27. 2020-07-30 [3] [RFC v2 40/76] target/riscv: rvv-0.9: floating-point move instruction qemu-riscv Richard Henderson 28. 2020-07-30 [2] [RFC v2 41/76] target/riscv: rvv-0.9: floating-point scalar move instruc qemu-riscv Richard Henderson 29. 2020-07-30 [2] [RFC v2 39/76] target/riscv: rvv-0.9: integer scalar move instructions qemu-riscv Richard Henderson 30. 2020-07-30 [2] [RFC v2 37/76] target/riscv: rvv-0.9: allow load element with sign-exten qemu-riscv Richard Henderson Next Last