Next Last 1. 2018-10-31 [1] [coreboot] There are ASMB5's on fleabay right now for linuxbios Taiidan 2. 2018-10-31 [6] [coreboot] CoffeeLake RVP11: Post code 0x7A "SELF Pay linuxbios Jose Trujillo 3. 2018-10-30 [4] [coreboot] Reducing FSP performance time linuxbios Nico Huber 4. 2018-10-29 [9] [coreboot] Matrix instead (or additionally to) IRC linuxbios Angel Pons 5. 2018-10-29 [1] [coreboot] Revisiting an old project from the FreeBIO linuxbios Gregg Levine 6. 2018-10-27 [4] [coreboot] Hardware diagnostic linuxbios Nico Huber 7. 2018-10-27 [6] [coreboot] [AMD family16h] What need to be done in co linuxbios Zheng Bao 8. 2018-10-26 [5] [coreboot] New Defects reported by Coverity Scan for linuxbios scan-admin 9. 2018-10-25 [1] [coreboot] uefi rootkit (lojax) linuxbios szbnwer 10. 2018-10-25 [5] [coreboot] Basic bios info linuxbios mad.scientist 11. 2018-10-24 [1] [coreboot] cbfstool issue linuxbios Wim Vervoorn 12. 2018-10-24 [3] [coreboot] Contribution to coreboot board status linuxbios Sven Dreyer 13. 2018-10-23 [8] [coreboot] T520 vs. T530 linuxbios Nico Huber 14. 2018-10-21 [1] [coreboot] F2A85M board linuxbios kinky_nekoboi 15. 2018-10-19 [4] [coreboot] Will a KCMA-D8 boot without the 8pin EPSV1 linuxbios Angel Pons 16. 2018-10-19 [1] [coreboot] FSP integration linuxbios Zvi Vered 17. 2018-10-17 [7] [coreboot] Modifying FSP in Binary Configuration Tool linuxbios Zvi Vered 18. 2018-10-17 [21] Re: [coreboot] SPI controller and Lock bits linuxbios Youness Alaou 19. 2018-10-16 [10] Re: [coreboot] Wired problems with Intel skylake base linuxbios Nico Huber 20. 2018-10-16 [9] Re: [coreboot] MRC in coreboot linuxbios Peter Stuge 21. 2018-10-15 [2] [coreboot] Watchdog timer (WDT) support on Kabylake w linuxbios Solanki, Nare 22. 2018-10-14 [1] [coreboot] What determines PCI-e capabilities per chi linuxbios Taiidan 23. 2018-10-14 [24] [coreboot] Source code for "Intel Firmware" linuxbios Nico Huber 24. 2018-10-11 [2] [coreboot] intel/i82801dx SMM memory size? linuxbios Kyösti Mälk 25. 2018-10-10 [1] [coreboot] Post code 0xCE: coreboot.rom with fsp linuxbios Zvi Vered 26. 2018-10-09 [1] [coreboot] post code 0xb0 after coreboot.rom BIOs bur linuxbios Zvi Vered 27. 2018-10-08 [3] [coreboot] Change superio in "Bayley Bay FSP-based CR linuxbios Zvi Vered 28. 2018-10-08 [2] Re: [coreboot] Lenovo G505S - spkmodem console sound, linuxbios Denis GNUtoo 29. 2018-10-08 [2] Re: [coreboot] USB 2.0 EHCI debug dongle doesn't prin linuxbios Denis GNUtoo 30. 2018-10-07 [3] [coreboot] Bootblock CMOS default and the checksum al linuxbios William McCal Next Last