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List: xen-cvs
Subject: [xen master] amd: remove VIRT_SC_MSR_HVM synthetic feature
From: patchbot () xen ! org
Date: 2022-11-17 2:53:41
Message-ID: E1ovV8X-0001ND-Lq () xenbits ! xenproject ! org
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commit e6440e2a72776149bacf3ab72c6453f5b72dea5f
Author: Roger Pau Monne <roger.pau@citrix.com>
AuthorDate: Tue Nov 15 14:26:56 2022 +0100
Commit: Andrew Cooper <andrew.cooper3@citrix.com>
CommitDate: Wed Nov 16 00:18:42 2022 +0000
amd: remove VIRT_SC_MSR_HVM synthetic feature
With the previous bugfix, X86_FEATURE_VIRT_SC_MSR_HVM is no longer
needed and can be replaced with an __initdata variable. This also
leaves asm/cpufeatures.h as it was in 4.16 which will simplify
backports.
No functional change intended.
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Release-acked-by: Henry Wang <Henry.Wang@arm.com>
Rewrite commit message. Move amd_virt_spec_ctrl into __initdata.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
xen/arch/x86/cpu/amd.c | 1 +
xen/arch/x86/cpuid.c | 9 +++++----
xen/arch/x86/include/asm/amd.h | 1 +
xen/arch/x86/include/asm/cpufeatures.h | 2 +-
xen/arch/x86/spec_ctrl.c | 7 +++----
5 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index a332087604..070060d90b 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -49,6 +49,7 @@ boolean_param("allow_unsafe", opt_allow_unsafe);
/* Signal whether the ACPI C1E quirk is required. */
bool __read_mostly amd_acpi_c1e_quirk;
bool __ro_after_init amd_legacy_ssbd;
+bool __initdata amd_virt_spec_ctrl;
static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo,
unsigned int *hi)
diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 822f9ace10..acc2f606ce 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -3,6 +3,7 @@
#include <xen/param.h>
#include <xen/sched.h>
#include <xen/nospec.h>
+#include <asm/amd.h>
#include <asm/cpuid.h>
#include <asm/hvm/hvm.h>
#include <asm/hvm/nestedhvm.h>
@@ -543,9 +544,9 @@ static void __init calculate_hvm_max_policy(void)
/*
* VIRT_SSBD is exposed in the default policy as a result of
- * VIRT_SC_MSR_HVM being set, it also needs exposing in the max policy.
+ * amd_virt_spec_ctrl being set, it also needs exposing in the max policy.
*/
- if ( boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) )
+ if ( amd_virt_spec_ctrl )
__set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset);
/*
@@ -606,9 +607,9 @@ static void __init calculate_hvm_def_policy(void)
/*
* Only expose VIRT_SSBD if AMD_SSBD is not available, and thus
- * VIRT_SC_MSR_HVM is set.
+ * amd_virt_spec_ctrl is set.
*/
- if ( boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) )
+ if ( amd_virt_spec_ctrl )
__set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset);
sanitise_featureset(hvm_featureset);
diff --git a/xen/arch/x86/include/asm/amd.h b/xen/arch/x86/include/asm/amd.h
index 6a42f68542..a975d3de26 100644
--- a/xen/arch/x86/include/asm/amd.h
+++ b/xen/arch/x86/include/asm/amd.h
@@ -152,6 +152,7 @@ extern bool amd_acpi_c1e_quirk;
void amd_check_disable_c1e(unsigned int port, u8 value);
extern bool amd_legacy_ssbd;
+extern bool amd_virt_spec_ctrl;
bool amd_setup_legacy_ssbd(void);
void amd_set_legacy_ssbd(bool enable);
diff --git a/xen/arch/x86/include/asm/cpufeatures.h b/xen/arch/x86/include/asm/cpufeatures.h
index c68ced1b82..865f110986 100644
--- a/xen/arch/x86/include/asm/cpufeatures.h
+++ b/xen/arch/x86/include/asm/cpufeatures.h
@@ -24,7 +24,7 @@ XEN_CPUFEATURE(APERFMPERF, X86_SYNTH( 8)) /* APERFMPERF */
XEN_CPUFEATURE(MFENCE_RDTSC, X86_SYNTH( 9)) /* MFENCE synchronizes RDTSC */
XEN_CPUFEATURE(XEN_SMEP, X86_SYNTH(10)) /* SMEP gets used by Xen itself */
XEN_CPUFEATURE(XEN_SMAP, X86_SYNTH(11)) /* SMAP gets used by Xen itself */
-XEN_CPUFEATURE(VIRT_SC_MSR_HVM, X86_SYNTH(12)) /* MSR_VIRT_SPEC_CTRL exposed to HVM */
+/* Bit 12 unused. */
XEN_CPUFEATURE(IND_THUNK_LFENCE, X86_SYNTH(13)) /* Use IND_THUNK_LFENCE */
XEN_CPUFEATURE(IND_THUNK_JMP, X86_SYNTH(14)) /* Use IND_THUNK_JMP */
XEN_CPUFEATURE(SC_NO_BRANCH_HARDEN, X86_SYNTH(15)) /* (Disable) Conditional branch hardening */
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index a0835143e3..a320b81947 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -515,12 +515,11 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
(boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ||
boot_cpu_has(X86_FEATURE_SC_RSB_HVM) ||
boot_cpu_has(X86_FEATURE_IBPB_ENTRY_HVM) ||
- boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) ||
+ amd_virt_spec_ctrl ||
opt_eager_fpu || opt_md_clear_hvm) ? "" : " None",
boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ? " MSR_SPEC_CTRL" : "",
(boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ||
- boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM)) ? " MSR_VIRT_SPEC_CTRL"
- : "",
+ amd_virt_spec_ctrl) ? " MSR_VIRT_SPEC_CTRL" : "",
boot_cpu_has(X86_FEATURE_SC_RSB_HVM) ? " RSB" : "",
opt_eager_fpu ? " EAGER_FPU" : "",
opt_md_clear_hvm ? " MD_CLEAR" : "",
@@ -1256,7 +1255,7 @@ void __init init_speculation_mitigations(void)
/* Support VIRT_SPEC_CTRL.SSBD if AMD_SSBD is not available. */
if ( opt_msr_sc_hvm && !cpu_has_amd_ssbd &&
(cpu_has_virt_ssbd || (amd_legacy_ssbd && amd_setup_legacy_ssbd())) )
- setup_force_cpu_cap(X86_FEATURE_VIRT_SC_MSR_HVM);
+ amd_virt_spec_ctrl = true;
/* Figure out default_xen_spec_ctrl. */
if ( has_spec_ctrl && ibrs )
--
generated by git-patchbot for /home/xen/git/xen.git#master
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