[prev in list] [next in list] [prev in thread] [next in thread]
List: xen-cvs
Subject: [Xen-changelog] [xen master] arm: return int from *_dcache_va_range
From: patchbot () xen ! org
Date: 2014-10-30 9:12:46
Message-ID: E1Xjlmg-0000W4-Ju () xenbits ! xen ! org
[Download RAW message or body]
commit 71d64afe3e122f22bebf9ae277f573b849eb75f4
Author: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
AuthorDate: Thu Oct 23 12:03:47 2014 +0200
Commit: Jan Beulich <jbeulich@suse.com>
CommitDate: Thu Oct 23 12:03:47 2014 +0200
arm: return int from *_dcache_va_range
These functions cannot really fail on ARM, but their x86 equivalents can
(-EOPNOTSUPP). Change the prototype to return int.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
---
xen/include/asm-arm/page.h | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
index fb1e710..69e9a61 100644
--- a/xen/include/asm-arm/page.h
+++ b/xen/include/asm-arm/page.h
@@ -268,16 +268,18 @@ extern size_t cacheline_bytes;
/* Functions for flushing medium-sized areas.
* if 'range' is large enough we might want to use model-specific
* full-cache flushes. */
-static inline void clean_dcache_va_range(const void *p, unsigned long size)
+static inline int clean_dcache_va_range(const void *p, unsigned long size)
{
const void *end;
dsb(sy); /* So the CPU issues all writes to the range */
for ( end = p + size; p < end; p += cacheline_bytes )
asm volatile (__clean_dcache_one(0) : : "r" (p));
dsb(sy); /* So we know the flushes happen before continuing */
+ /* ARM callers assume that dcache_* functions cannot fail. */
+ return 0;
}
-static inline void clean_and_invalidate_dcache_va_range
+static inline int clean_and_invalidate_dcache_va_range
(const void *p, unsigned long size)
{
const void *end;
@@ -285,6 +287,8 @@ static inline void clean_and_invalidate_dcache_va_range
for ( end = p + size; p < end; p += cacheline_bytes )
asm volatile (__clean_and_invalidate_dcache_one(0) : : "r" (p));
dsb(sy); /* So we know the flushes happen before continuing */
+ /* ARM callers assume that dcache_* functions cannot fail. */
+ return 0;
}
/* Macros for flushing a single small item. The predicate is always
--
generated by git-patchbot for /home/xen/git/xen.git#master
_______________________________________________
Xen-changelog mailing list
Xen-changelog@lists.xen.org
http://lists.xensource.com/xen-changelog
[prev in list] [next in list] [prev in thread] [next in thread]
Configure |
About |
News |
Add a list |
Sponsored by KoreLogic