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List:       usrp-users
Subject:    Re: [USRP-users] Installing PCIE drivers for x310
From:       James Humphries via USRP-users <usrp-users () lists ! ettus ! com>
Date:       2015-10-30 17:34:14
Message-ID: CAEwGFhU8N2zNWwO_36qkcSm9vYddPhq+sBLN0Nrnry8W4YakHQ () mail ! gmail ! com
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Glad that you are getting better performance! Have to say I learned a few
things about motherboards now...never would have thought that the right
slot was also the wrong slot...

Looking at the interrupts was actually a really useful method for debugging
PCIe performance, great idea!

-Trip

On Fri, Oct 30, 2015 at 11:54 AM, Jared Dulmage via USRP-users <
usrp-users@lists.ettus.com> wrote:

> I moved the PCIe interface card to an 8x slot which should have at least
> 4x PCIe lanes.  Now I'm getting around 24k - 25k interrupts/sec at 50M and
> 100MSps.  I am able to benchmark 200MSps, but piping that rate to a
> gr-fosphor display I get some overruns, though not at a blindingly fast
> rate.  So I think I would declare success.  Thanks for all your patience
> and help,
> Jared.
> ------------------------------------------------------
> Jared Dulmage
> Engineering Specialist
> Digital Comm. and Implementation Dept.
> Aerospace Corporation
> 310-336-3140
>
> _______________________________________________
> USRP-users mailing list
> USRP-users@lists.ettus.com
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>

[Attachment #5 (text/html)]

<div dir="ltr">Glad that you are getting better performance! Have to say I learned a \
few things about motherboards now...never would have thought that the right slot was \
also the wrong slot...<div><br></div><div>Looking at the interrupts was actually a \
really useful method for debugging PCIe performance, great \
idea!<br><div><br></div><div>-Trip</div></div></div><div class="gmail_extra"><br><div \
class="gmail_quote">On Fri, Oct 30, 2015 at 11:54 AM, Jared Dulmage via USRP-users \
<span dir="ltr">&lt;<a href="mailto:usrp-users@lists.ettus.com" \
target="_blank">usrp-users@lists.ettus.com</a>&gt;</span> wrote:<br><blockquote \
class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc \
solid;padding-left:1ex">I moved the PCIe interface card to an 8x slot which should \
have at least 4x PCIe lanes.   Now I&#39;m getting around 24k - 25k interrupts/sec at \
50M and 100MSps.   I am able to benchmark 200MSps, but piping that rate to a \
gr-fosphor display I get some overruns, though not at a blindingly fast rate.   So I \
think I would declare success.   Thanks for all your patience and help,<br> <div \
                class="HOEnZb"><div class="h5">Jared.<br>
------------------------------------------------------<br>
Jared Dulmage<br>
Engineering Specialist<br>
Digital Comm. and Implementation Dept.<br>
Aerospace Corporation<br>
<a href="tel:310-336-3140" value="+13103363140">310-336-3140</a><br>
<br>
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 </div></div></blockquote></div><br></div>



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