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List:       usrp-users
Subject:    [USRP-users] Reset switch X3x0 FPGA from UHD
From:       Ryan Marlow via USRP-users <usrp-users () lists ! ettus ! com>
Date:       2015-07-29 22:34:07
Message-ID: CADVE_uxzuybu00p3n1v2COVvP7SbKSh1Xt3i5NnwPgqUaf6Wog () mail ! gmail ! com
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Hello All,
Is there a way from the UHD to do a global reset or similar in the FPGA?
Such as a reset of the AXI bus.
Thanks,
Ryan

-- 
Ryan L. Marlow
Research Assistant in CCM Lab <http://ccm.ece.vt.edu>
Virginia <http://www.vt.edu/> Polytechnic Institute and State University

[Attachment #5 (text/html)]

<div dir="ltr"><div><div><div>Hello All,<br></div>Is there a way from the UHD to do a \
global reset or similar in the FPGA? Such as a reset of the AXI \
bus.<br></div>Thanks,<br></div>Ryan<br \
clear="all"><div><div><div><div><div><div><br>-- <br><div><div dir="ltr">Ryan L. \
Marlow<br>Research Assistant in <a href="http://ccm.ece.vt.edu" target="_blank">CCM \
Lab</a><br><div><a href="http://www.vt.edu/" target="_blank">Virginia</a>  \
Polytechnic Institute and State University</div></div></div> \
</div></div></div></div></div></div></div>



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