[prev in list] [next in list] [prev in thread] [next in thread] 

List:       uclinux-dev
Subject:    [uClinux-dev] How to Place Data Structures in NON-Caching Memory?
From:       "leeyang" <leeyang () ycig ! com>
Date:       2004-05-29 1:11:41
Message-ID: 001b01c44519$ea839f50$0365a8c0 () s
[Download RAW message or body]

ARM940T core has CP15 for cache controls.

I am working on S3C25XX CPUs
They are ARM940T core,and has ethernet needs
UNCACHED_MEMORY for DMA reason.

If you have similar problem like
http://mailman.uclinux.org/pipermail/uclinux-dev/2004-May/026311.html
,pls check out the latest uclinux-2.4.x kernel
from cvs.the newest page_alloc2.c had fixed the
uncached memory issue.

As for innel reason,you can check cpu manual.
cp15 register 2 and 6,it is well documented in S3c2500b manual,
and codes implements in arch/armnommu/mach-SMDK2500/config.c.

In fact,the text you read just went through the UNCACHED_MEMORY 
from my NAT box which has a S3C2500b cpu :)

_______________________________________________
uClinux-dev mailing list
uClinux-dev@uclinux.org
http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
This message was resent by uclinux-dev@uclinux.org
[prev in list] [next in list] [prev in thread] [next in thread]