[prev in list] [next in list] [prev in thread] [next in thread] 

List:       u-boot
Subject:    Re: [U-Boot] [PATCH 1/4] Exynos: Add hardware accelerated SHA 256
From:       Kim Phillips <kim.phillips () freescale ! com>
Date:       2013-02-28 20:00:12
Message-ID: 20130228140012.8a95f293d854190a05eec0de () freescale ! com
[Download RAW message or body]

On Thu, 28 Feb 2013 11:08:21 +0000
Akshay Saraswat <akshay.s@samsung.com> wrote:

> >On Wed, 27 Feb 2013 10:24:39 -0500
> 
> >Akshay Saraswat <akshay.s@samsung.com> wrote:

can you fix your mailer to not double space lines?

> >> +/* Maximum input data size is 8 MB. Timeout observed for data size above 8MB */
> >> +#define TIMEOUT_MS          100
> 
> >So if there's a drop in processor frequency, the driver times out
> >too early?  Not good.
> 
> Right now we dont have any way to calculate the timeout.

not even empirically?

> So, I have incremented this value
> to 500 which shall be good enough for the lowest of all frequencies. But I guess what we
> need here is some formula, to calculate timeout on the basis of frequency, which is nowhere
> defined.

That's odd - I see a bunch of frequencies advertised in
arch/arm/cpu/armv7/exynos/clock.c.

Or how about using a cycle counter instead?

btw, where can I find documentation for the ACE?

Kim

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[prev in list] [next in list] [prev in thread] [next in thread] 

Configure | About | News | Add a list | Sponsored by KoreLogic