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List:       sip-implementors
Subject:    Re: [Sip-implementors] SIP in a FPGA with VHDL
From:       "Ryan Mitchell" <brak2718 () gmail ! com>
Date:       2007-10-23 18:49:08
Message-ID: 522e1d170710231149t456b295em62dbff63f3c527f9 () mail ! gmail ! com
[Download RAW message or body]

It would be a much easier project to implement a soft core CPU in the fpga
then do the sip stack in software.

On 10/21/07, alexzhang@gdnt.com.cn <alexzhang@gdnt.com.cn> wrote:
>
> It is amazing and confusing that the VHDL is used to implement the SIP
> Protocol, which is application layer protocol.
> I only heard that the HLDC can be implemented via VHDL, but for the SIP
> protocol, have you considered to use the C++ language in the Xilinx EDA
> enviorment?
>
>
> Thanks,
> Alex
> 6-554-8782
>
> -----Original Message-----
> From: sip-implementors-bounces@lists.cs.columbia.edu
> [mailto:sip-implementors-bounces@lists.cs.columbia.edu] On Behalf Of
> Dale.Worley@comcast.net
> Sent: Saturday, October 20, 2007 2:43 AM
> To: Sip-implementors@lists.cs.columbia.edu
> Subject: Re: [Sip-implementors] SIP in a FPGA with VHDL
>
>
>    From: =?ISO-8859-1?Q?Luis_Alberto_Cacho_Garc=EDa?=
>     <luigi.floyd@gmail.com>
>
>    Hi, i'm newbie in this topic (SIP), and I tried to implement over
>    FPGA
>    specify in a Xilinx Spartan 3E, but the fact is that i don't know
>    the
>    architecture of SIP, I study the RFC3261 but I don't understand
>    very
>    well. I request your help to understand the protocol and implement
>    in a
>    FPGA with VHDL.
>
> I have no idea how one would implement SIP using VHDL.  SIP is a very
> complicated protocol.
>
> Do you know how you would implement a simpler protocol, such as TCP,
> using VHDL?
>
> Dale
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>
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>



-- 
Ryan Mitchell <rjm@tcl.net>
Telecom Logic, LLC
http://www.tcl.net

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