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List: sbcl-devel
Subject: Re: [Sbcl-devel] [Sbcl-commits] master: Pin boxed registers on arm64.
From: Bruce O'Neel <bruce.oneel () pckswarms ! ch>
Date: 2022-04-18 21:11:46
Message-ID: b177f1e947fb1594cf7944c5987f5ee1 () mail ! infomaniak ! com
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Thanks very much!
That fixes it. Both Arm32 and Arm64 build correctly.
cheers
bruce
On 2022-04-18T22:16:08.000+02:00, Stas Boukarev <stassats@gmail.com>
wrote:
I think there was a typo. Can you try now?
On Mon, Apr 18, 2022 at 11:11 PM Bruce O'Neel <bruce.oneel@pckswarms.ch> \
wrote:
Hi,
I think this breaks arm32.
$ git bisect bad
aa38e28e04f8a2fda20f17c6f8c5a3a1e95183a5 is the first bad commit
commit aa38e28e04f8a2fda20f17c6f8c5a3a1e95183a5
Author: Stas Boukarev <stassats@gmail.com>
Date: Mon Apr 18 19:58:01 2022 +0300
Pin boxed registers on arm64.
To avoid the interior pointer pairing, which doesn't work when LR
can't be paired with a code register.
:040000 040000 f5b9210b91146326a707566f68b35edff43bcbfd \
cdb49d0a3f2fb0dd5da5153331a39875470cc7b7 M src
"obj/from-xc/src/pcl/defclass.lisp-obj" \
[15/1944]
"obj/from-xc/src/code/early-defmethod.lisp-obj"
"obj/from-xc/src/code/format.lisp-obj"
"obj/from-xc/src/code/target-format.lisp-obj"
"obj/from-xc/src/code/late-globaldb.lisp-obj"
"obj/from-xc/src/code/redblack.lisp-obj"
Disassembler: 35 printers, 2 prefilters, 1 labelers
; Checking #P"/home/edoneel/tmp/sbcl/float-math.lisp-expr"
; compiling file "src/code/early-ntrace.lisp" (written 18 APR 2022 08:24:31 \
PM):
; wrote /home/edoneel/tmp/sbcl/obj/from-xc/src/code/early-ntrace.fasl
; compilation finished in 0:00:00.240
; compiling file "src/code/room.lisp" (written 18 APR 2022 08:24:31 PM):
While evaluating the form starting at line 135, column 0
of #P"/home/edoneel/tmp/sbcl/src/cold/warm.lisp":
debugger invoked on a CASE-FAILURE:
#<UNPRINTABLE instance of :UP {52F04FE1}> fell through ETYPECASE \
expression.
Wanted one of (SB-ARM-ASM::MEMORY-OPERAND).
Type HELP for debugger help, or (SB-EXT:EXIT) to exit from SBCL.
restarts (invokable by number or by possibly-abbreviated name):
0: [RETRY ] Retry EVAL of current toplevel form.
1: [CONTINUE ] Ignore error and continue loading file \
"/home/edoneel/tmp/sbcl/src/cold/warm.lisp".
2: [ABORT ] Abort loading file \
"/home/edoneel/tmp/sbcl/src/cold/warm.lisp".
3: [ABORT-BUILD] Abort building SBCL.
4: Ignore runtime option --eval \
"(sb-fasl::!warm-load \"src/cold/warm.lisp\")".
5: Skip rest of --eval and --load options.
6: Skip to toplevel READ/EVAL/PRINT loop.
7: [EXIT ] Exit SBCL (calling #'EXIT, killing the \
process).
(SB-ARM-ASM::EMIT-LOAD/STORE-INSTRUCTION #<SEGMENT {513E3491}> :AL :STORE \
:WORD #<TN t1[NULL] :NORMAL> #<UNPRINTABLE instance of :UP {52F04FE1}>)
0]
Thanks!
cheers
bruce
On 2022-04-18T19:18:09.000+02:00, stassats via Sbcl-commits \
<sbcl-commits@lists.sourceforge.net> wrote:
The branch "master" has been updated in SBCL:
via aa38e28e04f8a2fda20f17c6f8c5a3a1e95183a5 (commit)
from 6811e82a9ddd3acdc520a25baeab2a19edded9f9 (commit)
- Log -----------------------------------------------------------------
commit aa38e28e04f8a2fda20f17c6f8c5a3a1e95183a5
Author: Stas Boukarev <stassats@gmail.com>
Date: Mon Apr 18 19:58:01 2022 +0300
Pin boxed registers on arm64.
To avoid the interior pointer pairing, which doesn't work when LR
can't be paired with a code register.
---
src/runtime/gc-common.c | 16 ++--------------
src/runtime/gencgc.c | 12 +++++++++---
2 files changed, 11 insertions(+), 17 deletions(-)
diff --git a/src/runtime/gc-common.c b/src/runtime/gc-common.c
index af51908dc..f98b9160d 100644
--- a/src/runtime/gc-common.c
+++ b/src/runtime/gc-common.c
@@ -2377,6 +2377,7 @@ scavenge_control_stack(struct thread *th)
}
}
+#ifndef REG_CODE
/* Scavenging Interrupt Contexts */
static int boxed_registers[] = BOXED_REGISTERS;
@@ -2555,17 +2556,6 @@ scavenge_interrupt_context(os_context_t * context)
#endif
#ifdef ARCH_HAS_LINK_REGISTER
-#ifndef reg_CODE
- /* If LR points inside a code object, and there's no reg_CODE,
- don't pair it with anything, as there is nothing valid to \
pair
- LR with. On-stack code is pinned, so there is no need to \
fix up
- LR */
- int code_in_lr = 0;
-
- if (dynamic_space_code_from_pc((char \
*)*os_context_register_addr(context, reg_LR))) {
- code_in_lr = 1;
- }
-#endif
{
PAIR_INTERIOR_POINTER(lr);
}
@@ -2616,9 +2606,6 @@ scavenge_interrupt_context(os_context_t * context)
#endif
#ifdef ARCH_HAS_LINK_REGISTER
-#ifndef reg_CODE
- if(!code_in_lr)
-#endif
{
FIXUP_INTERIOR_POINTER(lr);
}
@@ -2648,6 +2635,7 @@ scavenge_interrupt_contexts(struct thread *th)
scavenge_interrupt_context(context);
}
}
+#endif /* !REG_CODE */
#endif /* x86oid targets */
/* Our own implementation of heapsort, because some C libraries have a \
qsort() diff --git a/src/runtime/gencgc.c b/src/runtime/gencgc.c
index 9e4cffd1a..d2253d5dd 100644
--- a/src/runtime/gencgc.c
+++ b/src/runtime/gencgc.c
@@ -3650,12 +3650,14 @@ static void semiconservative_pin_stack(struct \
thread* th,
#if GENCGC_IS_PRECISE && !defined(reg_CODE)
+static int boxed_registers[] = BOXED_REGISTERS;
+
/* Pin all (condemned) code objects pointed to by the chain of \
in-flight calls
* based on scanning from the innermost frame pointer. This relies on \
an exact backtrace,
* which some of our architectures have trouble obtaining. But it's \
theoretically
* more efficient to do it this way versus looking at all stack \
words to see
* whether each points to a code object. */
-static void pin_call_chain(struct thread* th) {
+static void pin_call_chain_and_boxed_registers(struct thread* th) {
lispobj *cfp = access_control_frame_pointer(th);
if (cfp) {
@@ -3672,6 +3674,10 @@ static void pin_call_chain(struct thread* th) {
for (i = i - 1; i >= 0; --i) {
os_context_t* context = nth_interrupt_context(i, th);
maybe_pin_code((lispobj)*os_context_register_addr(context, \
reg_LR)); +
+ for (unsigned i = 0; i < (sizeof(boxed_registers) / \
sizeof(int)); i++) { + \
pin_exact_root(*os_context_register_addr(context, boxed_registers[i])); + \
} }
}
@@ -3945,7 +3951,7 @@ garbage_collect_generation(generation_index_t \
generation, int raise, #elif defined REG_RA
conservative_pin_code_from_return_addresses(th);
#elif !defined(reg_CODE)
- pin_call_chain(th);
+ pin_call_chain_and_boxed_registers(th);
#endif
}
}
@@ -4028,7 +4034,7 @@ garbage_collect_generation(generation_index_t \
generation, int raise, if (conservative_stack) {
struct thread *th;
for_each_thread(th) {
-#ifndef LISP_FEATURE_MIPS // interrupt contexts already pinned everything \
they see +#if defined(LISP_FEATURE_MIPS) || !defined(reg_CODE) // interrupt \
contexts already pinned everything they see scavenge_interrupt_contexts(th);
#endif
scavenge_control_stack(th);
-----------------------------------------------------------------------
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[Attachment #5 (text/html)]
<div><br></div><div >Thanks very much!<br></div><div ><br></div><div >That fixes it. \
Both Arm32 and Arm64 build correctly.<br></div><div ><br></div><div \
>cheers<br></div><div ><br></div><div >bruce</div><div class="ik_mail_quote"><div>On \
> 2022-04-18T22:16:08.000+02:00, Stas Boukarev <stassats@gmail.com> \
> wrote:</div><blockquote class="ws-ng-quote"><pre style="white-space: normal;">I \
> think there was a typo. Can you try now?<br/><br/>On Mon, Apr 18, 2022 at 11:11 PM \
> Bruce O'Neel <<a target="_blank" class="defaultMailLink" \
> href="mailto:bruce.oneel@pckswarms.ch">bruce.oneel@pckswarms.ch</a>> \
> wrote:<br/><blockquote class="ws-ng-quote"> <br/> Hi,<br/><br/> I think this breaks \
> arm32.<br/><br/> $ git bisect bad<br/><br/> \
> aa38e28e04f8a2fda20f17c6f8c5a3a1e95183a5 is the first bad commit<br/><br/> commit \
> aa38e28e04f8a2fda20f17c6f8c5a3a1e95183a5<br/><br/> Author: Stas Boukarev <<a \
> target="_blank" class="defaultMailLink" \
> href="mailto:stassats@gmail.com">stassats@gmail.com</a>><br/><br/> Date: Mon \
> Apr 18 19:58:01 2022 +0300<br/><br/><br/> Pin boxed registers on \
> arm64.<br/><br/><br/><br/> To avoid the interior pointer pairing, which doesn't \
> work when LR<br/><br/> can't be paired with a code register.<br/><br/><br/> \
> :040000 040000 f5b9210b91146326a707566f68b35edff43bcbfd \
> cdb49d0a3f2fb0dd5da5153331a39875470cc7b7 M src<br/><br/><br/> \
> "obj/from-xc/src/pcl/defclass.lisp-obj" \
> [15/1944]<br/><br/> "obj/from-xc/src/code/early-defmethod.lisp-obj"<br/><br/> \
> "obj/from-xc/src/code/format.lisp-obj"<br/><br/> \
> "obj/from-xc/src/code/target-format.lisp-obj"<br/><br/> \
> "obj/from-xc/src/code/late-globaldb.lisp-obj"<br/><br/> \
> "obj/from-xc/src/code/redblack.lisp-obj"<br/><br/> Disassembler: 35 printers, 2 \
> prefilters, 1 labelers<br/><br/> ; Checking \
> #P"/home/edoneel/tmp/sbcl/float-math.lisp-expr"<br/><br/> ; compiling file \
> "src/code/early-ntrace.lisp" (written 18 APR 2022 08:24:31 PM):<br/><br/><br/> ; \
> wrote /home/edoneel/tmp/sbcl/obj/from-xc/src/code/early-ntrace.fasl<br/><br/> ; \
> compilation finished in 0:00:00.240<br/><br/> ; compiling file "src/code/room.lisp" \
> (written 18 APR 2022 08:24:31 PM):<br/><br/> While evaluating the form starting at \
> line 135, column 0<br/><br/> of \
> #P"/home/edoneel/tmp/sbcl/src/cold/warm.lisp":<br/><br/><br/> debugger invoked on a \
> CASE-FAILURE:<br/><br/> #<UNPRINTABLE instance of :UP {52F04FE1}> fell \
> through ETYPECASE expression.<br/><br/> Wanted one of \
> (SB-ARM-ASM::MEMORY-OPERAND).<br/><br/><br/> Type HELP for debugger help, or \
> (SB-EXT:EXIT) to exit from SBCL.<br/><br/><br/> restarts (invokable by number or by \
> possibly-abbreviated name):<br/><br/> 0: [RETRY ] Retry EVAL of current \
> toplevel form.<br/><br/> 1: [CONTINUE ] Ignore error and continue loading file \
> "/home/edoneel/tmp/sbcl/src/cold/warm.lisp".<br/><br/> 2: [ABORT ] Abort \
> loading file "/home/edoneel/tmp/sbcl/src/cold/warm.lisp".<br/><br/> 3: \
> [ABORT-BUILD] Abort building SBCL.<br/><br/> 4: Ignore runtime \
> option --eval "(sb-fasl::!warm-load \"src/cold/warm.lisp\")".<br/><br/> 5: \
> Skip rest of --eval and --load options.<br/><br/> 6: Skip to \
> toplevel READ/EVAL/PRINT loop.<br/><br/> 7: [EXIT ] Exit SBCL (calling \
> #'EXIT, killing the process).<br/><br/><br/> \
> (SB-ARM-ASM::EMIT-LOAD/STORE-INSTRUCTION #<SEGMENT {513E3491}> :AL :STORE \
> :WORD #<TN t1[NULL] :NORMAL> #<UNPRINTABLE instance of :UP \
> {52F04FE1}>)<br/><br/> 0]<br/><br/><br/><br/> Thanks!<br/><br/> cheers<br/><br/> \
> bruce<br/><br/> On 2022-04-18T19:18:09.000+02:00, stassats via Sbcl-commits <<a \
> target="_blank" class="defaultMailLink" \
> href="mailto:sbcl-commits@lists.sourceforge.net">sbcl-commits@lists.sourceforge.net</a>> \
> wrote:<br/><br/> The branch "master" has been updated in SBCL:<br/> via \
> aa38e28e04f8a2fda20f17c6f8c5a3a1e95183a5 (commit)<br/> from \
> 6811e82a9ddd3acdc520a25baeab2a19edded9f9 (commit)<br/><br/> - Log \
> -----------------------------------------------------------------<br/> commit \
> aa38e28e04f8a2fda20f17c6f8c5a3a1e95183a5<br/> Author: Stas Boukarev <<a \
> target="_blank" class="defaultMailLink" \
> href="mailto:stassats@gmail.com">stassats@gmail.com</a>><br/> Date: Mon Apr 18 \
> 19:58:01 2022 +0300<br/><br/> Pin boxed registers on arm64.<br/><br/> To \
> avoid the interior pointer pairing, which doesn't work when LR<br/> can't be \
> paired with a code register.<br/> ---<br/> src/runtime/gc-common.c | 16 \
> ++--------------<br/> src/runtime/gencgc.c | 12 +++++++++---<br/> 2 files \
> changed, 11 insertions(+), 17 deletions(-)<br/><br/> diff --git \
> a/src/runtime/gc-common.c b/src/runtime/gc-common.c<br/> index af51908dc..f98b9160d \
> 100644<br/> --- a/src/runtime/gc-common.c<br/> +++ b/src/runtime/gc-common.c<br/> \
> @@ -2377,6 +2377,7 @@ scavenge_control_stack(struct thread *th)<br/> }<br/> \
> }<br/><br/> +#ifndef REG_CODE<br/> /* Scavenging Interrupt Contexts */<br/><br/> \
> static int boxed_registers[] = BOXED_REGISTERS;<br/> @@ -2555,17 +2556,6 @@ \
> scavenge_interrupt_context(os_context_t * context)<br/> #endif<br/><br/> #ifdef \
> ARCH_HAS_LINK_REGISTER<br/> -#ifndef reg_CODE<br/> - /* If LR points inside a \
> code object, and there's no reg_CODE,<br/> - don't pair it with anything, as \
> there is nothing valid to pair<br/> - LR with. On-stack code is pinned, so \
> there is no need to fix up<br/> - LR */<br/> - int code_in_lr = 0;<br/> \
> -<br/> - if (dynamic_space_code_from_pc((char \
> *)*os_context_register_addr(context, reg_LR))) {<br/> - code_in_lr = 1;<br/> \
> - }<br/> -#endif<br/> {<br/> PAIR_INTERIOR_POINTER(lr);<br/> \
> }<br/> @@ -2616,9 +2606,6 @@ scavenge_interrupt_context(os_context_t * \
> context)<br/> #endif<br/> #ifdef ARCH_HAS_LINK_REGISTER<br/><br/> -#ifndef \
> reg_CODE<br/> - if(!code_in_lr)<br/> -#endif<br/> {<br/> \
> FIXUP_INTERIOR_POINTER(lr);<br/> }<br/> @@ -2648,6 +2635,7 @@ \
> scavenge_interrupt_contexts(struct thread *th)<br/> \
> scavenge_interrupt_context(context);<br/> }<br/> }<br/> +#endif /* !REG_CODE \
> */<br/> #endif /* x86oid targets */<br/><br/> /* Our own implementation of \
> heapsort, because some C libraries have a qsort()<br/> diff --git \
> a/src/runtime/gencgc.c b/src/runtime/gencgc.c<br/> index 9e4cffd1a..d2253d5dd \
> 100644<br/> --- a/src/runtime/gencgc.c<br/> +++ b/src/runtime/gencgc.c<br/> @@ \
> -3650,12 +3650,14 @@ static void semiconservative_pin_stack(struct thread* \
> th,<br/><br/> #if GENCGC_IS_PRECISE && !defined(reg_CODE)<br/><br/> +static int \
> boxed_registers[] = BOXED_REGISTERS;<br/> +<br/> /* Pin all (condemned) code \
> objects pointed to by the chain of in-flight calls<br/> * based on scanning from \
> the innermost frame pointer. This relies on an exact backtrace,<br/> * which some \
> of our architectures have trouble obtaining. But it's theoretically<br/> * more \
> efficient to do it this way versus looking at all stack words to see<br/> * \
> whether each points to a code object. */<br/> -static void pin_call_chain(struct \
> thread* th) {<br/> +static void pin_call_chain_and_boxed_registers(struct thread* \
> th) {<br/> lispobj *cfp = access_control_frame_pointer(th);<br/><br/> if \
> (cfp) {<br/> @@ -3672,6 +3674,10 @@ static void pin_call_chain(struct thread* th) \
> {<br/> for (i = i - 1; i &gt;= 0; --i) {<br/> os_context_t* \
> context = nth_interrupt_context(i, th);<br/> \
> maybe_pin_code((lispobj)*os_context_register_addr(context, reg_LR));<br/> +<br/> + \
> for (unsigned i = 0; i < (sizeof(boxed_registers) / sizeof(int)); i++) {<br/> + \
> pin_exact_root(*os_context_register_addr(context, boxed_registers[i]));<br/> + \
> }<br/> }<br/><br/> }<br/> @@ -3945,7 +3951,7 @@ \
> garbage_collect_generation(generation_index_t generation, int raise,<br/> #elif \
> defined REG_RA<br/> \
> conservative_pin_code_from_return_addresses(th);<br/> #elif \
> !defined(reg_CODE)<br/> - pin_call_chain(th);<br/> + \
> pin_call_chain_and_boxed_registers(th);<br/> #endif<br/> }<br/> \
> }<br/> @@ -4028,7 +4034,7 @@ garbage_collect_generation(generation_index_t \
> generation, int raise,<br/> if (conservative_stack) {<br/> struct \
> thread *th;<br/> for_each_thread(th) {<br/> -#ifndef LISP_FEATURE_MIPS // \
> interrupt contexts already pinned everything they see<br/> +#if \
> defined(LISP_FEATURE_MIPS) || !defined(reg_CODE) // interrupt contexts already \
> pinned everything they see<br/> scavenge_interrupt_contexts(th);<br/> \
> #endif<br/> scavenge_control_stack(th);<br/><br/> \
> -----------------------------------------------------------------------<br/><br/><br/> \
> hooks/post-receive<br/> --<br/> SBCL<br/><br/><br/> \
> _______________________________________________<br/> Sbcl-commits mailing list<br/> \
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> href="mailto:Sbcl-commits@lists.sourceforge.net">Sbcl-commits@lists.sourceforge.net</a><br/> \
> <a target="_blank" class="defaultMailLink" \
> href="https://lists.sourceforge.net/lists/listinfo/sbcl-commits">https://lists.sourceforge.net/lists/listinfo/sbcl-commits</a><br/><br/> \
> _______________________________________________<br/> Sbcl-devel mailing list<br/> \
> <a target="_blank" class="defaultMailLink" \
> href="mailto:Sbcl-devel@lists.sourceforge.net">Sbcl-devel@lists.sourceforge.net</a><br/> \
> <a target="_blank" class="defaultMailLink" \
> href="https://lists.sourceforge.net/lists/listinfo/sbcl-devel">https://lists.sourceforge.net/lists/listinfo/sbcl-devel</a></pre></blockquote></div>
>
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