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List:       sbcl-commits
Subject:    [Sbcl-commits] master: arm64, load-immediate-word: fewer instructions for equal halves.
From:       stassats via Sbcl-commits <sbcl-commits () lists ! sourceforge ! net>
Date:       2023-09-28 10:30:41
Message-ID: 1695897041.641182.1094 () sfp-scm-2 ! v30 ! lw ! sourceforge ! com
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The branch "master" has been updated in SBCL:
       via  5a7d3ca2900f3a105a40fc406ca923ba9fd0ee53 (commit)
      from  114ee777445f96dcbf60a18bd2ea5d38f4d55669 (commit)

- Log -----------------------------------------------------------------
commit 5a7d3ca2900f3a105a40fc406ca923ba9fd0ee53
Author: Stas Boukarev <stassats@gmail.com>
Date:   Thu Sep 28 00:21:12 2023 +0300

    arm64, load-immediate-word: fewer instructions for equal halves.
---
 src/compiler/arm64/move.lisp | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/src/compiler/arm64/move.lisp b/src/compiler/arm64/move.lisp
index 75cec90d5..346b42b2e 100644
--- a/src/compiler/arm64/move.lisp
+++ b/src/compiler/arm64/move.lisp
@@ -85,6 +85,18 @@
                               ((= c d)
                                (try c a 0 b 16)))))))
              y)
+            ((and (not single-mov)
+                  (not single-instruction)
+                  (= (ldb (byte 32 0) val)
+                     (ldb (byte 32 32) val))
+                  (let ((a (ldb (byte 16 0) val))
+                        (b (ldb (byte 16 16) val)))
+                    (when (and (/= a #xFFFF 0)
+                               (/= b #xFFFF 0))
+                      (inst movz y a)
+                      (inst movk y b 16)
+                      (inst orr y y (lsl y 32)))))
+             y)
             ((and (< ffff-count zero-count)
                   (or single-mov
                       (not single-instruction)))

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