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List:       ros-diffs
Subject:    [ros-diffs] [ekohl] 26907: Calculate L2 cache size for AMD CPUs.
From:       ekohl () svn ! reactos ! org
Date:       2007-05-26 16:37:11
Message-ID: 20070526163637.D322498997 () mail ! reactos ! org
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Author: ekohl
Date: Sat May 26 20:37:11 2007
New Revision: 26907

URL: http://svn.reactos.org/svn/reactos?rev=26907&view=rev
Log:
Calculate L2 cache size for AMD CPUs.

Modified:
    trunk/reactos/ntoskrnl/ke/i386/cpu.c

Modified: trunk/reactos/ntoskrnl/ke/i386/cpu.c
URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/i386/cpu.c?rev=26907&r1=26906&r2=26907&view=diff
 ==============================================================================
--- trunk/reactos/ntoskrnl/ke/i386/cpu.c (original)
+++ trunk/reactos/ntoskrnl/ke/i386/cpu.c Sat May 26 20:37:11 2007
@@ -510,13 +510,21 @@
                     }
                 } while (--CacheRequests);
             }
-        break;
-
-    case CPU_AMD:
-
-        /* FIXME */
-        DPRINT1("Not handling AMD caches yet\n");
-        break;
+            break;
+
+        case CPU_AMD:
+
+            /* Check if we support CPUID 0x80000006 */
+            CPUID(Data, 0x80000000);
+            if (Data[0] >= 6)
+            {
+                /* Get 2nd level cache and tlb size */
+                CPUID(Data, 0x80000006);
+
+                /* Set the L2 Cache Size */
+                Pcr->SecondLevelCacheSize = (Data[2] & 0xFFFF0000) >> 6;
+            }
+            break;
     }
 }
 


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