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List:       qemu-ppc
Subject:    Re: [Qemu-ppc] [Qemu-devel] [V3 PATCH 08/14] target-ppc: Add ISA2.06 Float to Integer Instructions
From:       Richard Henderson <rth () twiddle ! net>
Date:       2013-12-24 15:36:05
Message-ID: 52B9A9E5.3060206 () twiddle ! net
[Download RAW message or body]

On 12/18/2013 12:49 PM, Tom Musta wrote:
> This patch adds the four floating point to integer conversion instructions
> introduced by Power ISA V2.06:
> 
>   - Floating Convert to Integer Word Unsigned (fctiwu)
>   - Floating Convert to Integer Word Unsigned with Round Toward
>     Zero (fctiwuz)
>   - Floating Convert to Integer Doubleword Unsigned (fctidu)
>   - Floating Convert to Integer Doubleword Unsigned with Round
>     Toward Zero (fctiduz)
> 
> A common macro is developed to eliminate repetitive code.  Existing instructions
> are also re-implemented to use this macro (fctiw, fctiwz, fctid, fctidz), thus
> eliminating copy/paste code.
> 
> Signed-off-by: Tom Musta <tommusta@gmail.com>
> ---
>  target-ppc/fpu_helper.c |  122 +++++++++++++----------------------------------
>  target-ppc/helper.h     |    4 ++
>  target-ppc/translate.c  |   12 +++++
>  3 files changed, 50 insertions(+), 88 deletions(-)

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~


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