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List: qemu-discuss
Subject: Re: PCI data buffer
From: "Frantisek Rysanek" <Frantisek.Rysanek () post ! cz>
Date: 2021-10-06 18:41:49
Message-ID: 615DEDED.19260.77C7545 () Frantisek ! Rysanek ! post ! cz
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Hello Nada,
perhaps you should be more specific about your mission :-)
Accessing storage controllers is something stock operating systems do
for a living. To do that, they have drivers. If you're interested
what a storage controller driver can look like, I suggest that you
study the source code of some open-source OS, such as Linux or
FreeBSD.
Apparently, Linux has several layers/interfaces where a
hardware-specific storage driver can plug - ordered from top to
bottom:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tre
e/drivers/block
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tre
e/drivers/scsi
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tre
e/drivers/ata
I am less conversant in FreeBSD internals - the directory tree
appears flatter compared to Linux, but I can probably suggest the
Adaptec RAID driver as an example - namely its PCI interface source
file, which appears to contain systemwide-generic "PCI PnP structs"
used by FreeBSD to "register" the driver into the system.
https://cgit.freebsd.org/src/tree/sys/dev/aacraid/aacraid_pci.c
At higher layers, some relevant buzzwords seem to be IOC or GEOM, but
I'm not really sure.
Do you know what a PCI device interface looks like at the hardware
layer? Up to six BAR's (plus a dedicated option ROM bar), plus the
capability to do DMA... and of course to throw IRQ events. These are
generic "primitives", used/combined in proprietary ways by various
proprietary devices (adaptor cards in slots, and onboard/on-chip
subsystems). And, the software drivers access these accordingly.
From the perspective of a PCI device driver author, the PCI root
complex is catered for by the OS pretty much "automagically". You ask
the OS for things you want to achieve, and details under the hood are
none of your business...
If I'm heading in the wrong direction, feel free to ask :-)
Set me straight.
Frank
On 6 Oct 2021 at 17:22, Nada Lachtar wrote:
>
> Hi there,
> =A0
> I=B4m working on a project that requires me to read the content of t=
he
> PCI bus. In particular, I=B4m looking for the content buffer that is=
> used to copy the data between the bus and storage controller.
> =A0
> I=B4ve been looking into the implementation of the pci-host and
> pci-bridge, and within the scsi implementation. =A0I would like to g=
et
> any pointers to help me understand how the data can be read.
> =A0
> Thank you,
> Nada
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