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List:       qemu-devel
Subject:    Re: [PATCH 2/3] target/hppa: mask offset bits in gva
From:       Sven Schnelle <svens () stackframe ! org>
Date:       2024-04-02 6:29:41
Message-ID: 87o7asxooa.fsf () t14 ! stackframe ! org
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Richard Henderson <richard.henderson@linaro.org> writes:

> On 4/1/24 20:01, Sven Schnelle wrote:
>> Implement dr2 and the mfdiag/mtdiag instructions. dr2 contains a bit
>> which enables/disables space id hashing. Seabios would then set
>> this bit when booting. Linux would disable it again during boot (this
>> would be the same like on real hardware), while HP-UX would leave it
>> enabled.
>
> Pointer to documentation?

There's no documentation about that in the public. There's this code since the
beginning of linux on hppa in the linux kernel (arch/parisc/kernel/pacache.S):

/* Disable Space Register Hashing for PCXL */

.word         0x141c0600      /* mfdiag %dr0, %r28 */
depwi           0,28,2, %r28  /* Clear DHASH_EN & IHASH_EN */
.word         0x141c0240      /* mtdiag %r28, %dr0 */
b,n           srdis_done

srdis_pa20:

/* Disable Space Register Hashing for PCXU,PCXU+,PCXW,PCXW+,PCXW2 */

.word         0x144008bc            /* mfdiag %dr2, %r28 */
depdi         0, 54,1, %r28         /* clear DIAG_SPHASH_ENAB (bit 54) */
.word         0x145c1840            /* mtdiag %r28, %dr2 */

So PCXL (32 bit) uses dr0, while 64 bit uses dr2. This still is the same
on my C8000 - i see firmware still contains code reading dr2 to figure
out whether space id hashing is enabled. The mfdiag/mtdiag instructions
are described in the PCXL/PCXL2 ERS.

https://parisc.wiki.kernel.org/index.php/File:PCXL_ers.pdf
https://parisc.wiki.kernel.org/index.php/File:Pcxl2_ers.pdf

There was a discussion mentioning disabling Space ID hashing in Linux:

https://yhbt.net/lore/linux-parisc/199912161642.IAA11478@lucy.cup.hp.com/


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