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List:       qemu-devel
Subject:    Re: [PATCH 2/3] target/hppa: mask offset bits in gva
From:       Sven Schnelle <svens () stackframe ! org>
Date:       2024-03-25 6:27:00
Message-ID: 87h6gu25e3.fsf () t14 ! stackframe ! org
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Richard Henderson <richard.henderson@linaro.org> writes:

> On 3/24/24 08:41, Sven Schnelle wrote:
> > 7f09e0: val=000fffb0301fffff r2=110e0f0000000001 r1=01fffffffffff600 \
> > phys=fffffffffffb0000 4K aid=1 pl1=0, pl2=0 type=1 (DATA RW) 'val' is the value \
> > constructed from IOR/ISR,
> 
> Is this byte swapped in some weird way?  I do not see how 'val'
> corresponds to any of the addresses we're talking about.  From here,
> the string "301fffff" appears to an out-of-context grep hit.

It's just both values combined together, where the 301fffff is basically
the ISR content. It's not a out of context grep - the real machines i have
are constructing the same value, and the same offset into the pagetable.
I verified that by patching the DTLB miss handler in HPUX to write the
ISR/IOR and calulated pagetable offset/value to PAGE0 and looked with
the kernel debugger at the values.


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