--- hw/fdc.c Sat Apr 14 13:01:32 2007 +++ hw/fdc.c Thu May 17 08:54:36 2007 @@ -376,7 +376,8 @@ uint8_t state; uint8_t dma_en; uint8_t cur_drv; - uint8_t bootsel; + uint8_t bootsel; + uint8_t first_sense; /* Command FIFO */ uint8_t fifo[FD_SECTOR_LEN]; uint32_t data_pos; @@ -596,7 +597,8 @@ fdctrl->version = 0x90; /* Intel 82078 controller */ fdctrl->irq = irq; fdctrl->dma_chann = dma_chann; - fdctrl->io_base = io_base; + fdctrl->io_base = io_base; + fdctrl->first_sense=0; fdctrl->config = 0x60; /* Implicit seek, polling & FIFO enabled */ if (fdctrl->dma_chann != -1) { fdctrl->dma_en = 1; @@ -651,7 +653,7 @@ return; } #endif - if (~(fdctrl->state & FD_CTRL_INTR)) { + if (!(fdctrl->state & FD_CTRL_INTR)) { qemu_set_irq(fdctrl->irq, 1); fdctrl->state |= FD_CTRL_INTR; } @@ -668,6 +670,7 @@ fdctrl_reset_irq(fdctrl); /* Initialise controller */ fdctrl->cur_drv = 0; + fdctrl->first_sense = 4; /* FIFO state */ fdctrl->data_pos = 0; fdctrl->data_len = 0; @@ -1388,27 +1394,35 @@ /* RECALIBRATE */ FLOPPY_DPRINTF("RECALIBRATE command\n"); /* 1 parameter cmd */ - fdctrl->data_len = 2; + fdctrl->data_len = 2; + fdctrl->first_sense=0; goto enqueue; case 0x08: /* SENSE_INTERRUPT_STATUS */ FLOPPY_DPRINTF("SENSE_INTERRUPT_STATUS command (%02x)\n", - fdctrl->int_status); + fdctrl->int_status); + uint8_t act_drv = fdctrl->cur_drv; /* No parameters cmd: returns status if no interrupt */ -#if 0 + if (fdctrl->first_sense > 0) + act_drv=4-fdctrl->first_sense--; + +#if 1 fdctrl->fifo[0] = - fdctrl->int_status | (cur_drv->head << 2) | fdctrl->cur_drv; + (fdctrl->state & FD_CTRL_INTR) ? + fdctrl->int_status : 0x80 | (cur_drv->head << 2) | act_drv; #else /* XXX: int_status handling is broken for read/write commands, so we do this hack. It should be suppressed ASAP */ fdctrl->fifo[0] = - 0x20 | (cur_drv->head << 2) | fdctrl->cur_drv; + 0x20 | (cur_drv->head << 2) | act_drv ; #endif + fdctrl->fifo[1] = cur_drv->track; - fdctrl_set_fifo(fdctrl, 2, 0); - fdctrl_reset_irq(fdctrl); - fdctrl->int_status = 0xC0; + fdctrl_set_fifo(fdctrl, ((fdctrl->fifo[0] & 0xF0) != 0x80) ? 2 : 1, 0); + + fdctrl_reset_irq(fdctrl); + fdctrl->int_status = 0xC0; return; case 0x0E: /* DUMPREG */