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List: qemu-commits
Subject: [Qemu-commits] [qemu/qemu] 59b1a9: target-microblaze: Respect MSR.PVR as read-only
From: GitHub <noreply () github ! com>
Date: 2018-04-30 16:16:14
Message-ID: 5ae7414ec092d_69d02b264d5d3c04161eb () hookshot-fe-7191cb1 ! cp1-iad ! github ! net ! mail
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Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 59b1a90b0b5dc6b368364e9e1d40184eb4506c39
https://github.com/qemu/qemu/commit/59b1a90b0b5dc6b368364e9e1d40184eb4506c39
Author: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Date: 2018-04-30 (Mon, 30 Apr 2018)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target-microblaze: Respect MSR.PVR as read-only
Respect MSR.PVR as read-only. We were wrongly overwriting the PVR bit.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Commit: 5153bb897a3d41d52c5b7187e9e40d5c26b04d57
https://github.com/qemu/qemu/commit/5153bb897a3d41d52c5b7187e9e40d5c26b04d57
Author: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Date: 2018-04-30 (Mon, 30 Apr 2018)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target-microblaze: Fix trap checks for FPU insns
Fix trap checks for FPU insns when extended FPU insns are enabled.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Commit: df1e528aad265a5c6ad7c84ef2861a5e4b2913bf
https://github.com/qemu/qemu/commit/df1e528aad265a5c6ad7c84ef2861a5e4b2913bf
Author: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Date: 2018-04-30 (Mon, 30 Apr 2018)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target-microblaze: Don't clobber the IMM reg for ld/st reversed
Do not clobber the IMM register on reversed load/stores.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Commit: bd9e66086b93a0a908a70a2679819d2d080d87b4
https://github.com/qemu/qemu/commit/bd9e66086b93a0a908a70a2679819d2d080d87b4
Author: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Date: 2018-04-30 (Mon, 30 Apr 2018)
Changed paths:
M target/microblaze/mmu.c
Log Message:
-----------
target-microblaze: mmu: Make TLBSX write-only
Make TLBSX write-only and guest-error log reads from it.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Commit: fce6a8eceb07e27f0cdea87427f4e560dfa0b1c8
https://github.com/qemu/qemu/commit/fce6a8eceb07e27f0cdea87427f4e560dfa0b1c8
Author: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Date: 2018-04-30 (Mon, 30 Apr 2018)
Changed paths:
M target/microblaze/mmu.c
Log Message:
-----------
target-microblaze: mmu: Make the TLBX MISS bit read-only
Make the TLBX MISS bit read-only.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Commit: e0eff721e186d48dc4890414cfe117a61c103804
https://github.com/qemu/qemu/commit/e0eff721e186d48dc4890414cfe117a61c103804
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2018-04-30 (Mon, 30 Apr 2018)
Changed paths:
M target/microblaze/mmu.c
M target/microblaze/translate.c
Log Message:
-----------
Merge remote-tracking branch \
'remotes/edgar/tags/edgar/xilinx-next-2018-04-30.for-upstream' into staging
edgar/xilinx-next-2018-01.for-upstream
# gpg: Signature made Mon 30 Apr 2018 15:52:35 BST
# gpg: using RSA key 29C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) \
<edgar.iglesias@xilinx.com>" # gpg: aka "Edgar E. Iglesias \
<edgar.iglesias@gmail.com>" # Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 \
29C5 9678 0F6B CA83
* remotes/edgar/tags/edgar/xilinx-next-2018-04-30.for-upstream:
target-microblaze: mmu: Make the TLBX MISS bit read-only
target-microblaze: mmu: Make TLBSX write-only
target-microblaze: Don't clobber the IMM reg for ld/st reversed
target-microblaze: Fix trap checks for FPU insns
target-microblaze: Respect MSR.PVR as read-only
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/c2c768500f17...e0eff721e186
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