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List: qemu-arm
Subject: [Qemu-arm] [PATCH for-2.9 20/30] aspeed/smc: add a 'sdram_base' property
From: Cédric Le Goater <clg () kaod ! org>
Date: 2016-11-29 15:43:58
Message-ID: 1480434248-27138-21-git-send-email-clg () kaod ! org
[Download RAW message or body]
The setting of the DRAM address of the DMA transaction depends on the
DRAM base address of the SoC, so we add a property to give this
information to the model.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
---
hw/arm/aspeed_soc.c | 5 ++++-
hw/ssi/aspeed_smc.c | 1 +
include/hw/ssi/aspeed_smc.h | 3 +++
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index b3e7f07b615d..4fb777e6df6e 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -253,7 +253,10 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in(DEVICE(&s->vic), 12));
/* FMC, The number of CS is set at the board level */
- object_property_set_bool(OBJECT(&s->fmc), true, "realized", &err);
+ object_property_set_int(OBJECT(&s->fmc), sc->info->sdram_base, "sdram-base",
+ &err);
+ object_property_set_bool(OBJECT(&s->fmc), true, "realized", &local_err);
+ error_propagate(&err, local_err);
if (err) {
error_propagate(errp, err);
return;
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 8e7e3bd9e335..24c78aa57537 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -819,6 +819,7 @@ static const VMStateDescription vmstate_aspeed_smc = {
};
static Property aspeed_smc_properties[] = {
+ DEFINE_PROP_UINT64("sdram-base", AspeedSMCState, sdram_base, 0),
DEFINE_PROP_UINT32("num-cs", AspeedSMCState, num_cs, 1),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index 39ee601940e8..88a904849801 100644
--- a/include/hw/ssi/aspeed_smc.h
+++ b/include/hw/ssi/aspeed_smc.h
@@ -96,6 +96,9 @@ typedef struct AspeedSMCState {
uint8_t r_timings;
uint8_t conf_enable_w0;
+ /* for DMA support */
+ uint64_t sdram_base;
+
AspeedSMCFlash *flashes;
} AspeedSMCState;
--
2.7.4
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