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List:       oprofile-list
Subject:    [PATCH] Use PMC5/PMC6 on ppc64 arch for run cycles/run instructions
From:       Maynard Johnson <maynardj () us ! ibm ! com>
Date:       2013-04-26 19:23:09
Message-ID: 517AD41D.6000306 () us ! ibm ! com
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This patch has already been pushed upstream, since it's simple and small
and affects only the ppc64 architecture, which I maintain for oprofile.

------------------------------------------------------------------

Use PMC5/PMC6 on ppc64 arch for run cycles/run instructions

The IBM Power processor architecture (ppc64) counts instructions
and cycles on PMC5 and PMC6 (respectively) when the run latch is
set (i.e., when not in idle state).  On POWER6, these counters
were not capable of generating interrupts, so they could not be
used for profiling purposes; therefore, oprofile counted those
events (PM_RUN_INST_CMPL and PM_RUN_CYC) using other counters.
But with the newer POWER7 processor, PMC5 and PMC6 can generate
interrupts, so it makes sense to leverage those two counters
instead of using the other 4 (programmable) counters.  Doing
so could, theoretically allow us to count up to 6 events
simultaneously without the kernel having to do multiplexing.

This patch will force PM_RUN_INST_CMPL and PM_RUN_CYC to be
counted on PMC5 and PMC6 (respectively) when running on an
IBM POWER7 system.

Signed-off-by: Maynard Johnson <maynardj@us.ibm.com>
---
 libperf_events/operf_utils.cpp |   19 +++++++++++++++++--
 1 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/libperf_events/operf_utils.cpp b/libperf_events/operf_utils.cpp
index dca7792..521681b 100644
--- a/libperf_events/operf_utils.cpp
+++ b/libperf_events/operf_utils.cpp
@@ -71,6 +71,7 @@ static bool sfile_init_done;
  * opreport can understand.
  */
 #if PPC64_ARCH
+extern op_cpu cpu_type;
 #define NIL_CODE ~0U
 
 #if HAVE_LIBPFM3
@@ -140,6 +141,10 @@ static bool _op_get_event_codes(vector<operf_event_t> * evt_vec)
 
 	for (unsigned int i = 0; i < num_events; i++) {
 		operf_event_t event = (*evt_vec)[i];
+		if (event.evt_code != NIL_CODE) {
+			events_converted++;
+			continue;
+		}
 		memset(evt_name, 0, OP_MAX_EVT_NAME_LEN);
 		if (!strcmp(event.name, "CYCLES")) {
 			strcpy(evt_name ,"PM_CYC") ;
@@ -176,7 +181,17 @@ bool OP_perf_utils::op_convert_event_vals(vector<operf_event_t> * evt_vec)
 	int ret;
 	for (unsigned int i = 0; i < evt_vec->size(); i++) {
 		operf_event_t event = (*evt_vec)[i];
-		event.evt_code = NIL_CODE;
+		if (cpu_type == CPU_PPC64_POWER7) {
+			if (!strncmp(event.name, "PM_RUN_CYC", strlen("PM_RUN_CYC"))) {
+				event.evt_code = 0x600f4;
+			} else if (!strncmp(event.name, "PM_RUN_INST_CMPL", strlen("PM_RUN_INST_CMPL"))) {
+				event.evt_code = 0x500fa;
+			} else {
+				event.evt_code = NIL_CODE;
+			}
+		} else {
+			event.evt_code = NIL_CODE;
+		}
 		(*evt_vec)[i] = event;
 	}
 
@@ -201,7 +216,7 @@ bool OP_perf_utils::op_convert_event_vals(vector<operf_event_t> * evt_vec)
 #endif
 }
 
-#endif
+#endif // PPC64_ARCH
 
 
 static inline void update_trans_last(struct operf_transient * trans)
-- 
1.7.1


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