[prev in list] [next in list] [prev in thread] [next in thread] 

List:       oprofile-list
Subject:    AMD64 "Cache Block Commands" events
From:       Derek Schuff <dschuff () purdue ! edu>
Date:       2005-09-23 22:39:33
Message-ID: 200509231739.33500.dschuff () purdue ! edu
[Download RAW message or body]

hello all,

i'm new around here, so sorry if this question has been answered already 
(couldnt find it in the archives).

I'm interested in collecting an event that doesn't appear to be currently 
supported in oprofile (specifically AMD64 event 0xEA, "Cache Block Commands", 
as documented in AMD's BIOS and Kernel developer's guide, rev. 3.26, page 
308).

I notice the events/x86-64/hammer/{events,unit_masks} files in the source 
distribution. is it sufficient just to add the events there and rebuild?

or... perhaps someone knows more than I do about opteron performance counters. 
specifically i'm interested in cache line invalidations caused by coherence 
actions (ie one processor has a line in its cache and another one writes to 
it). the 10 and 20 unit masks of the cache block commands event would seem to 
be good for that sort of thing, but perhaps something else is just as good? 
the AMD doc's arent quite as clear as they could be.

thanks in advance, 

-derek


-------------------------------------------------------
SF.Net email is sponsored by:
Tame your development challenges with Apache's Geronimo App Server. 
Download it for free - -and be entered to win a 42" plasma tv or your very
own Sony(tm)PSP.  Click here to play: http://sourceforge.net/geronimo.php
_______________________________________________
oprofile-list mailing list
oprofile-list@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/oprofile-list
[prev in list] [next in list] [prev in thread] [next in thread] 

Configure | About | News | Add a list | Sponsored by KoreLogic