'[openocd:tickets] Re: #359 Unable to connect to stm8s105 targets. (Other stm8 targets work)'

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List:       openocd-development
Subject:    [openocd:tickets] Re: #359 Unable to connect to stm8s105 targets. (Other stm8 targets work)
From:       "brad roy" <prosper0 () users ! sourceforge ! net>
Date:       2022-08-16 21:40:31
Message-ID: /p/openocd/tickets/359/2e389f4b77480eebcfdb9692c6713c75d287990b.tickets () openocd ! p ! sourceforge ! net
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No, though I did go through and add some additional decoupling capacitors to the \
power and reset line, and I haven't seen an undefined halt since, though I also added \
'resume' to my openocd script too. It does seem to be working well, I can flash and \
debug without anything unusual happening


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** [tickets:#359] Unable to connect to stm8s105 targets. (Other stm8 targets work)**

**Status:** new
**Milestone:** 0.11.0
**Labels:** stm8s 
**Created:** Tue Aug 16, 2022 04:35 PM UTC by brad roy
**Last Updated:** Tue Aug 16, 2022 05:35 PM UTC
**Owner:** nobody


I'm unable to connect to stm8s105 chips. Other stm8 chips - the stm8s103f3 works, and \
the stm8l151c6 also connects. I *can* connect and read/write to flash and opt on the \
same stm8s105k6 chips with the stm8flash tool, using the same stlink.

**STM8s105.cfg**
$ openocd -f interface/stlink-dap.cfg -f target/stm8s105.cfg 
Open On-Chip Debugger 0.11.0-g228ede4-dirty (2022-07-25-13:51)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst

Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : STLINK V2J17S4 (API v2) VID:PID 0483:3748
Info : Target voltage: 3.235884
Error: stlink_swim_enter_failed (unable to connect to the target)

**STM8s.cfg (with the '105 chip)**
$ openocd -f interface/stlink-dap.cfg -f target/stm8s.cfg 
Open On-Chip Debugger 0.11.0-g228ede4-dirty (2022-07-25-13:51)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst

Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : STLINK V2J17S4 (API v2) VID:PID 0483:3748
Info : Target voltage: 3.243799
Error: stlink_swim_enter_failed (unable to connect to the target)

**writing flash with stm8flash (same chip/programmer)**
$ stm8flash -c stlinkv2 -p stm8s105k6 -w ./Blink.ino.hex 
Determine FLASH area
Due to its file extension (or lack thereof), "./Blink.ino.hex" is considered as INTEL \
HEX format! 1986 bytes at 0x8000... OK
Bytes written: 1986

(LED is blinking)

**stm8l151c6**
$ openocd -f interface/stlink-dap.cfg -f target/stm8l.cfg 
Open On-Chip Debugger 0.11.0-g228ede4-dirty (2022-07-25-13:51)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst

Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : STLINK V2J17S4 (API v2) VID:PID 0483:3748
Info : Target voltage: 3.240633
Info : clock speed 800 kHz
Info : starting gdb server for stm8l.cpu on 3333
Info : Listening on port 3333 for gdb connections
target halted due to undefined, pc: 0x00006000


**stm8s103f3**
$ openocd -f interface/stlink-dap.cfg -f target/stm8s103.cfg 
Open On-Chip Debugger 0.11.0-g228ede4-dirty (2022-07-25-13:51)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst

Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : STLINK V2J17S4 (API v2) VID:PID 0483:3748
Info : Target voltage: 3.237467
Info : clock speed 800 kHz
Info : starting gdb server for stm8s.cpu on 3333
Info : Listening on port 3333 for gdb connections



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<div class="markdown_content"><p>No, though I did go through and add some additional \
decoupling capacitors to the power and reset line, and I haven't seen an undefined \
halt since, though I also added 'resume' to my openocd script too. It does seem to be \
working well, I can flash and debug without anything unusual happening</p> <hr/>
<p><strong> <a class="alink" \
href="https://sourceforge.net/p/openocd/tickets/359/">[tickets:#359]</a> Unable to \
connect to stm8s105 targets. (Other stm8 targets work)</strong></p> \
<p><strong>Status:</strong> new<br/> <strong>Milestone:</strong> 0.11.0<br/>
<strong>Labels:</strong> stm8s <br/>
<strong>Created:</strong> Tue Aug 16, 2022 04:35 PM UTC by brad roy<br/>
<strong>Last Updated:</strong> Tue Aug 16, 2022 05:35 PM UTC<br/>
<strong>Owner:</strong> nobody</p>
<p>I'm unable to connect to stm8s105 chips. Other stm8 chips - the stm8s103f3 works, \
and the stm8l151c6 also connects. I <em>can</em> connect and read/write to flash and \
opt on the same stm8s105k6 chips with the stm8flash tool, using the same stlink.</p> \
<p><strong>STM8s105.cfg</strong><br/> $ openocd -f interface/stlink-dap.cfg -f \
target/stm8s105.cfg <br/> Open On-Chip Debugger 0.11.0-g228ede4-dirty \
(2022-07-25-13:51)<br/> Licensed under GNU GPL v2<br/>
For bug reports, read<br/>
<a href="http://openocd.org/doc/doxygen/bugs.html" \
rel="nofollow">http://openocd.org/doc/doxygen/bugs.html</a><br/> srst_only separate \
srst_gates_jtag srst_open_drain connect_deassert_srst</p> <p>Info : Listening on port \
6666 for tcl connections<br/> Info : Listening on port 4444 for telnet \
connections<br/> Info : STLINK V2J17S4 (API v2) VID:PID 0483:3748<br/>
Info : Target voltage: 3.235884<br/>
Error: stlink_swim_enter_failed (unable to connect to the target)</p>
<p><strong>STM8s.cfg (with the '105 chip)</strong><br/>
$ openocd -f interface/stlink-dap.cfg -f target/stm8s.cfg <br/>
Open On-Chip Debugger 0.11.0-g228ede4-dirty (2022-07-25-13:51)<br/>
Licensed under GNU GPL v2<br/>
For bug reports, read<br/>
<a href="http://openocd.org/doc/doxygen/bugs.html" \
rel="nofollow">http://openocd.org/doc/doxygen/bugs.html</a><br/> srst_only separate \
srst_gates_jtag srst_open_drain connect_deassert_srst</p> <p>Info : Listening on port \
6666 for tcl connections<br/> Info : Listening on port 4444 for telnet \
connections<br/> Info : STLINK V2J17S4 (API v2) VID:PID 0483:3748<br/>
Info : Target voltage: 3.243799<br/>
Error: stlink_swim_enter_failed (unable to connect to the target)</p>
<p><strong>writing flash with stm8flash (same chip/programmer)</strong><br/>
$ stm8flash -c stlinkv2 -p stm8s105k6 -w ./Blink.ino.hex <br/>
Determine FLASH area<br/>
Due to its file extension (or lack thereof), "./Blink.ino.hex" is considered as INTEL \
HEX format!<br/> 1986 bytes at 0x8000... OK<br/>
Bytes written: 1986</p>
<p>(LED is blinking)</p>
<p><strong>stm8l151c6</strong><br/>
$ openocd -f interface/stlink-dap.cfg -f target/stm8l.cfg <br/>
Open On-Chip Debugger 0.11.0-g228ede4-dirty (2022-07-25-13:51)<br/>
Licensed under GNU GPL v2<br/>
For bug reports, read<br/>
<a href="http://openocd.org/doc/doxygen/bugs.html" \
rel="nofollow">http://openocd.org/doc/doxygen/bugs.html</a><br/> srst_only separate \
srst_gates_jtag srst_open_drain connect_deassert_srst</p> <p>Info : Listening on port \
6666 for tcl connections<br/> Info : Listening on port 4444 for telnet \
connections<br/> Info : STLINK V2J17S4 (API v2) VID:PID 0483:3748<br/>
Info : Target voltage: 3.240633<br/>
Info : clock speed 800 kHz<br/>
Info : starting gdb server for stm8l.cpu on 3333<br/>
Info : Listening on port 3333 for gdb connections<br/>
target halted due to undefined, pc: 0x00006000</p>
<p><strong>stm8s103f3</strong><br/>
$ openocd -f interface/stlink-dap.cfg -f target/stm8s103.cfg <br/>
Open On-Chip Debugger 0.11.0-g228ede4-dirty (2022-07-25-13:51)<br/>
Licensed under GNU GPL v2<br/>
For bug reports, read<br/>
<a href="http://openocd.org/doc/doxygen/bugs.html" \
rel="nofollow">http://openocd.org/doc/doxygen/bugs.html</a><br/> srst_only separate \
srst_gates_jtag srst_open_drain connect_deassert_srst</p> <p>Info : Listening on port \
6666 for tcl connections<br/> Info : Listening on port 4444 for telnet \
connections<br/> Info : STLINK V2J17S4 (API v2) VID:PID 0483:3748<br/>
Info : Target voltage: 3.237467<br/>
Info : clock speed 800 kHz<br/>
Info : starting gdb server for stm8s.cpu on 3333<br/>
Info : Listening on port 3333 for gdb connections</p>
<hr/>
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