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List:       openocd-development
Subject:    [OpenOCD-devel] [PATCH]: 61356ae armv7m: always set xPSR.T=1 when starting an algorithm
From:       gerrit () openocd ! org (gerrit)
Date:       2018-08-27 21:34:34
Message-ID: 20180827213434.3BD5625225AE () mail ! openocd ! org
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This is an automated email from Gerrit.

Cody Schafer (openocd@codyps.com) just uploaded a new patch set to Gerrit, which you \
can find at http://openocd.zylin.com/4658

-- gerrit

commit 61356aee6c9cb7a45b64bb7efe8314d6aba66596
Author: Cody P Schafer <openocd@codyps.com>
Date:   Mon Aug 27 10:50:46 2018 -0400

    armv7m: always set xPSR.T=1 when starting an algorithm
    
    When using the built-in stlink on a st nucleo-f767zi, in some conditions
    every-other flash (using `program` or `flash_write image erase fw.elf`)
    was failing.
    
    Investigation revealed than in some cases after running an algorithm,
    the xPSR.T bit (thumb mode, required on armv7m) was being unset. As a
    result, when the processor was started to run the algorithm, it
    immediately locked up with a usage fault.
    
    It is unclear precisesly why xPSR.T is being set to 0, but explicitly
    setting xPSR.T in start_algorithm causes flashing on the st
    nucleo-f767zi to proceed successfully.
    
    Setting xPSR here more cleanly starts our algorithms, as it more closely
    models a reset. That said, this is an extra register write that may or
    may not be needed & is likely working around an adapter (st-link)
    specific issue.
    
    Ticket: https://sourceforge.net/p/openocd/tickets/203/
    Signed-off-by: Cody P Schafer <openocd@codyps.com>
    Change-Id: I4dc3427ab195d06c3fd780ea768027fefccc4c28

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 7d3bd73..2a640b4 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -407,6 +407,20 @@ int armv7m_start_algorithm(struct target *target,
 		armv7m_set_core_reg(reg, reg_params[i].value);
 	}
 
+	{
+		/* Ensure xPSR.T is set to avoid trying to run things in arm
+		 * (non-thumb) mode, which armv7m does not support.
+		 *
+		 * This works around what may be a st-link adapter bug where
+		 * the read-back of xPSR is inaccurate, causing us to clear
+		 * xPSR.T
+		 */
+		struct reg *reg = &armv7m->arm.core_cache->reg_list[ARMV7M_xPSR];
+		buf_set_u32(reg->value, 0, 32, 0x01000000);
+		reg->valid = 1;
+		reg->dirty = 1;
+	}
+
 	if (armv7m_algorithm_info->core_mode != ARM_MODE_ANY &&
 			armv7m_algorithm_info->core_mode != core_mode) {
 

-- 

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