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List:       openocd-development
Subject:    [OpenOCD-devel] [PATCH]: 802757f Ftdi: RFC, optimizations for ejtag
From:       gerrit () openocd ! zylin ! com
Date:       2013-12-21 9:44:31
Message-ID: 20131221094431.33BD0242CB () openocd ! zylin ! com
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This is an automated email from Gerrit.

Salvador Arroyo (sarroyofdez@yahoo.es) just uploaded a new patch set to Gerrit, which \
you can find at http://openocd.zylin.com/1838

-- gerrit

commit 802757fcd0836583f439fa43d984a6b504e60fa1
Author: Salvador Arroyo <sarroyofdez@yahoo.es>
Date:   Sat Dec 21 10:31:42 2013 +0100

    Ftdi: RFC, optimizations for ejtag
    
    This patch is intended for mips32 ejtag but this or similar
    modifications can also be useful for other targets.
    Current code makes 2 tap transitions not needed for ejtag.
    This only makes the code run at most 5% slower.
    At higher scan rates the main problem is the latency
    associated with each ftdi command, 200nS or 3 clock cycles
    at 15000Khz.
    Currently 6 ftdi commands are needed to perform a fast data
    scan. The patch reduces them to only 3.
    The execution rate for the fast data queue goes to around
    1.15Mbyte/S, for a target that supports scan_delay = 0.
    Tested with a ft232h not with ft2232h based adapter.
    
    Change-Id: I778c5abf4ea523e49b4a5e8e0a2558eaede60e1e
    Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>

diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index a6070b1..fc68764 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -427,22 +427,38 @@ static void ftdi_execute_scan(struct jtag_command *cmd)
 			if (field->out_value)
 				bit_copy(&last_bit, 0, field->out_value, field->num_bits - 1, 1);
 			uint8_t tms_bits = 0x01;
-			mpsse_clock_tms_cs(mpsse_ctx,
-					&tms_bits,
-					0,
-					field->in_value,
-					field->num_bits - 1,
-					1,
-					last_bit,
-					JTAG_MODE);
-			tap_set_state(tap_state_transition(tap_get_state(), 1));
-			mpsse_clock_tms_cs_out(mpsse_ctx,
-					&tms_bits,
-					1,
-					1,
-					last_bit,
-					JTAG_MODE);
-			tap_set_state(tap_state_transition(tap_get_state(), 0));
+
+			if (tap_get_end_state() == TAP_IDLE) {
+				tms_bits = 0x03;
+				mpsse_clock_tms_cs(mpsse_ctx,
+						&tms_bits,
+						0,
+						field->in_value,
+						field->num_bits - 1,
+						3,
+						last_bit,
+						JTAG_MODE);
+				tap_set_state(tap_state_transition(tap_get_state(), 1));
+				tap_set_state(tap_state_transition(tap_get_state(), 1));
+				tap_set_state(tap_state_transition(tap_get_state(), 0));
+			} else {
+				mpsse_clock_tms_cs(mpsse_ctx,
+						&tms_bits,
+						0,
+						field->in_value,
+						field->num_bits - 1,
+						1,
+						last_bit,
+						JTAG_MODE);
+				tap_set_state(tap_state_transition(tap_get_state(), 1));
+				mpsse_clock_tms_cs_out(mpsse_ctx,
+						&tms_bits,
+						1,
+						1,
+						last_bit,
+						JTAG_MODE);
+				tap_set_state(tap_state_transition(tap_get_state(), 0));
+			}
 		} else
 			mpsse_clock_data(mpsse_ctx,
 				field->out_value,
diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c
index 9a334fc..2da3fad 100644
--- a/src/jtag/drivers/mpsse.c
+++ b/src/jtag/drivers/mpsse.c
@@ -540,22 +540,22 @@ void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t \
*out, unsigned out_  if (this_bits > 7)
 			this_bits = 7;
 
-		if (this_bits > 0) {
-			buffer_write_byte(ctx, mode);
-			buffer_write_byte(ctx, this_bits - 1);
-			uint8_t data = 0;
-			/* TODO: Fix MSB first, if allowed in MPSSE */
-			bit_copy(&data, 0, out, out_offset, this_bits);
-			out_offset += this_bits;
-			buffer_write_byte(ctx, data | (tdi ? 0x80 : 0x00));
-			if (in)
-				in_offset += buffer_add_read(ctx,
-						in,
-						in_offset,
-						this_bits,
-						8 - this_bits);
-			length -= this_bits;
+		buffer_write_byte(ctx, mode);
+		buffer_write_byte(ctx, this_bits - 1);
+		uint8_t data = 0;
+		/* TODO: Fix MSB first, if allowed in MPSSE */
+		bit_copy(&data, 0, out, out_offset, this_bits);
+		out_offset += this_bits;
+		buffer_write_byte(ctx, data | (tdi ? 0x80 : 0x00));
+		if (in) {
+			in_offset += buffer_add_read(ctx,
+					in,
+					in_offset,
+					1,
+					8 - this_bits);
+			in = NULL;
 		}
+		length -= this_bits;
 	}
 }
 
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 6d51c56..0d05ef5 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -400,37 +400,23 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 
 int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_t \
*data)  {
-	struct jtag_tap *tap;
-
-	tap = ejtag_info->tap;
-	assert(tap != NULL);
-
-	struct scan_field fields[2];
-	uint8_t spracc = 0;
-	uint8_t t[4] = {0, 0, 0, 0};
+	assert(ejtag_info->tap != NULL);
+	struct jtag_tap *tap = ejtag_info->tap;
 
-	/* fastdata 1-bit register */
-	fields[0].num_bits = 1;
-	fields[0].out_value = &spracc;
-	fields[0].in_value = NULL;
+	struct scan_field field;
+	uint8_t scan_out[5] = {0, 0, 0, 0, 0};
 
-	/* processor access data register 32 bit */
-	fields[1].num_bits = 32;
-	fields[1].out_value = t;
+	field.num_bits = 33;
+	field.out_value = scan_out;
 
 	if (write_t) {
-		fields[1].in_value = NULL;
-		buf_set_u32(t, 0, 32, *data);
+		field.in_value = NULL;
+		buf_set_u32(scan_out, 1, 32, *data);
 	} else
-		fields[1].in_value = (uint8_t *) data;
+		field.in_value = (uint8_t *)data;
 
-	jtag_add_dr_scan(tap, 2, fields, TAP_IDLE);
-
-	if (!write_t && data)
-		jtag_add_callback(mips_le_to_h_u32,
-			(jtag_callback_data_t) data);
+	jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
 
 	keep_alive();
-
 	return ERROR_OK;
 }

-- 

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