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List:       openocd-development
Subject:    [OpenOCD-devel] [PATCH]: 3a35e80 arm: fix arm reg regression
From:       gerrit () openocd ! zylin ! com
Date:       2013-04-23 13:35:48
Message-ID: 20130423133548.E6E372409F () openocd ! zylin ! com
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This is an automated email from Gerrit.

Spencer Oliver (spen@spen-soft.co.uk) just uploaded a new patch set to Gerrit, which \
you can find at http://openocd.zylin.com/1362

-- gerrit

commit 3a35e80c722469553490e2a4a36d1efeccd6bd2d
Author: Spencer Oliver <spen@spen-soft.co.uk>
Date:   Tue Apr 23 12:15:07 2013 +0100

    arm: fix arm reg regression
    
    Seems commit fc2abe63fd3cea7497da7be2955d333bd3f800b9 caused a regression
    in that the arm reg cmd no longer worked. The issue was caused because we
    changed the value of ARM_MODE_THREAD which was being checked in \
arm_init_arch_info.  
    Change-Id: Id571d4ab336d1b0e2b93363147af245d24b65ca5
    Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 26e8116..2e0fd23 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -1094,6 +1094,7 @@ static int arm11_target_create(struct target *target, \
Jim_Interp *interp)  if (!arm11)
 		return ERROR_FAIL;
 
+	arm11->arm.core_type = ARM_MODE_ANY;
 	arm_init_arch_info(target, &arm11->arm);
 
 	arm11->jtag_info.tap = target->tap;
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index faeed0d..07beef5 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2806,6 +2806,7 @@ int arm7_9_init_arch_info(struct target *target, struct \
arm7_9_common *arm7_9)  arm7_9->dcc_downloads = false;
 
 	arm->arch_info = arm7_9;
+	arm->core_type = ARM_MODE_ANY;
 	arm->read_core_reg = arm7_9_read_core_reg;
 	arm->write_core_reg = arm7_9_write_core_reg;
 	arm->full_context = arm7_9_full_context;
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 5e9c598..3fe8f01 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -2997,6 +2997,7 @@ static int xscale_init_arch_info(struct target *target,
 
 	/* prepare ARMv4/5 specific information */
 	arm->arch_info = xscale;
+	arm->core_type = ARM_MODE_ANY;
 	arm->read_core_reg = xscale_read_core_reg;
 	arm->write_core_reg = xscale_write_core_reg;
 	arm->full_context = xscale_full_context;

-- 

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