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List:       openbsd-tech
Subject:    just a few 1<<31 to 1U<<31
From:       Artturi Alm <artturi.alm () gmail ! com>
Date:       2017-09-27 18:06:01
Message-ID: 20170927180601.GA99638 () gmail ! com
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Hi,

was looking at sdmmc, and then i did remember this rev1.3 commit:
http://cvsweb.openbsd.org/cgi-bin/cvsweb/src/sys/arch/armv7/imx/imxccm.c#rev1.3

also fixes those from under sys/dev/fdt and sys/arch/armv7 i found,
didn't look elsewhere.

-Artturi


diff --git a/sys/arch/armv7/imx/imxccm.c b/sys/arch/armv7/imx/imxccm.c
index 4847d49f92f..b09cae0f9a4 100644
--- a/sys/arch/armv7/imx/imxccm.c
+++ b/sys/arch/armv7/imx/imxccm.c
@@ -129,7 +129,7 @@
 #define CCM_ANALOG_PLL_USB1_POWER		(1 << 12)
 #define CCM_ANALOG_PLL_USB1_ENABLE		(1 << 13)
 #define CCM_ANALOG_PLL_USB1_BYPASS		(1 << 16)
-#define CCM_ANALOG_PLL_USB1_LOCK		(1 << 31)
+#define CCM_ANALOG_PLL_USB1_LOCK		(1U << 31)
 #define CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK	0x1
 #define CCM_ANALOG_PLL_USB2_EN_USB_CLKS		(1 << 6)
 #define CCM_ANALOG_PLL_USB2_POWER		(1 << 12)
diff --git a/sys/arch/armv7/imx/imxiomuxc.c b/sys/arch/armv7/imx/imxiomuxc.c
index 03adb6e3a47..e4b5e825cda 100644
--- a/sys/arch/armv7/imx/imxiomuxc.c
+++ b/sys/arch/armv7/imx/imxiomuxc.c
@@ -106,7 +106,7 @@
 
 #define IOMUX_CONFIG_SION		(1 << 4)
 
-#define IMX_PINCTRL_NO_PAD_CTL		(1 << 31)
+#define IMX_PINCTRL_NO_PAD_CTL		(1U << 31)
 #define IMX_PINCTRL_SION		(1 << 30)
 
 struct imxiomuxc_softc {
diff --git a/sys/dev/fdt/if_dwxe.c b/sys/dev/fdt/if_dwxe.c
index 85c5098af31..253e0d94204 100644
--- a/sys/dev/fdt/if_dwxe.c
+++ b/sys/dev/fdt/if_dwxe.c
@@ -184,7 +184,7 @@ struct dwxe_desc {
 #define DWXE_TX_PAYLOAD_ERR		(1 << 12)
 #define DWXE_TX_LENGTH_ERR		(1 << 14)
 #define DWXE_TX_HEADER_ERR		(1 << 16)
-#define DWXE_TX_DESC_CTL		(1 << 31)
+#define DWXE_TX_DESC_CTL		(1U << 31)
 
 /* Rx status bits */
 #define DWXE_RX_PAYLOAD_ERR		(1 << 0)
@@ -202,7 +202,7 @@ struct dwxe_desc {
 #define DWXE_RX_FRM_LEN_MASK		0x3fff
 #define DWXE_RX_FRM_LEN_SHIFT		16
 #define DWXE_RX_DAF_FAIL		(1 << 30)
-#define DWXE_RX_DESC_CTL		(1 << 31)
+#define DWXE_RX_DESC_CTL		(1U << 31)
 
 /* Tx size bits */
 #define DWXE_TX_BUF_SIZE		(0xfff << 0)
@@ -213,11 +213,11 @@ struct dwxe_desc {
 #define DWXE_TX_CHECKSUM_CTL_FULL	(3 << 27)
 #define DWXE_TX_FIR_DESC		(1 << 29)
 #define DWXE_TX_LAST_DESC		(1 << 30)
-#define DWXE_TX_INT_CTL		(1 << 31)
+#define DWXE_TX_INT_CTL		(1U << 31)
 
 /* Rx size bits */
 #define DWXE_RX_BUF_SIZE		(0xfff << 0)
-#define DWXE_RX_INT_CTL		(1 << 31)
+#define DWXE_RX_INT_CTL		(1U << 31)
 
 /* EMAC syscon bits */
 #define SYSCON				0x30
diff --git a/sys/dev/sdmmc/sdmmc_ioreg.h b/sys/dev/sdmmc/sdmmc_ioreg.h
index b23edd898d7..f2dc066d5fc 100644
--- a/sys/dev/sdmmc/sdmmc_ioreg.h
+++ b/sys/dev/sdmmc/sdmmc_ioreg.h
@@ -26,7 +26,7 @@
 
 /* CMD52 arguments */
 #define SD_ARG_CMD52_READ		(0<<31)
-#define SD_ARG_CMD52_WRITE		(1<<31)
+#define SD_ARG_CMD52_WRITE		(1U<<31)
 #define SD_ARG_CMD52_FUNC_SHIFT		28
 #define SD_ARG_CMD52_FUNC_MASK		0x7
 #define SD_ARG_CMD52_EXCHANGE		(1<<27)
@@ -38,7 +38,7 @@
 
 /* CMD53 arguments */
 #define SD_ARG_CMD53_READ		(0<<31)
-#define SD_ARG_CMD53_WRITE		(1<<31)
+#define SD_ARG_CMD53_WRITE		(1U<<31)
 #define SD_ARG_CMD53_FUNC_SHIFT		28
 #define SD_ARG_CMD53_FUNC_MASK		0x7
 #define SD_ARG_CMD53_BLOCK_MODE		(1<<27)
@@ -54,7 +54,7 @@
 #define MMC_R5(resp)			((resp)[0])
 
 /* SD R4 response (IO OCR) */
-#define SD_IO_OCR_MEM_READY		(1<<31)
+#define SD_IO_OCR_MEM_READY		(1U<<31)
 #define SD_IO_OCR_NUM_FUNCTIONS(ocr)	(((ocr) >> 28) & 0x3)
 /* XXX big fat memory present "flag" because we don't know better */
 #define SD_IO_OCR_MEM_PRESENT		(0xf<<24)
diff --git a/sys/dev/sdmmc/sdmmcreg.h b/sys/dev/sdmmc/sdmmcreg.h
index c984afc9f78..87116959652 100644
--- a/sys/dev/sdmmc/sdmmcreg.h
+++ b/sys/dev/sdmmc/sdmmcreg.h
@@ -49,7 +49,7 @@
 #define SD_APP_SEND_SCR			51	/* R1 */
 
 /* OCR bits */
-#define MMC_OCR_MEM_READY		(1<<31)	/* memory power-up status bit */
+#define MMC_OCR_MEM_READY		(1U<<31)	/* memory power-up status bit */
 #define MMC_OCR_ACCESS_MODE_MASK	0x60000000 /* bits 30:29 */
 #define MMC_OCR_SECTOR_MODE		(1<<30)
 #define MMC_OCR_BYTE_MODE		(1<<29)

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