[prev in list] [next in list] [prev in thread] [next in thread] 

List:       llvm-dev
Subject:    Re: [LLVMdev] Spilling register and frame indices
From:       Andrew Lenharth <alenhar2 () cs ! uiuc ! edu>
Date:       2006-05-23 19:15:12
Message-ID: 1148411712.16281.3.camel () vilya
[Download RAW message or body]

On Tue, 2006-05-23 at 13:04 -0500, Chris Lattner wrote:
> > That approach sounds suboptimal. By "reserving" one register we can already
> > cause some values to be spilled, that otherwise would be stored in
> > register.
> 
> Right.
> 
> PowerPC has the same problem in certain cases.  For example, vector loads 
> only support reg+reg addressing, which means you have to load the offset 
> from the stack pointer into a register before doing the load.
> 
> In the case of PPC, we currently just reserve a register for this purpose. 
> This is suboptimal, but doesn't cause a significant performance issue 
> normally.

Alpha also has this problem for some offsets.  I haven't looked at what
PPC does, but alpha has the loads and stores that might need the
indexing kill an extra register, thus ensuring it is available for the
inserted instruction.  You don't need to reserve a register (globally)
only for these cases, just make sure you have it available when you need
it.

Andrew


[prev in list] [next in list] [prev in thread] [next in thread] 

Configure | About | News | Add a list | Sponsored by KoreLogic