[prev in list] [next in list] [prev in thread] [next in thread]
List: linuxbios
Subject: [coreboot] 4.9: Payload is not running
From: Zvi Vered <veredz72 () gmail ! com>
Date: 2019-02-10 22:13:43
Message-ID: CABRndgz5=-KjCX4cSops+jndgi9WMU54GG_hTgWmUhSSoQsT0g () mail ! gmail ! com
[Download RAW message or body]
[Attachment #2 (multipart/alternative)]
Hello,
I got the following output via RS232 console:
------------------------------------------------------------------------------
coreboot-4.9-539-gde3ace0-dirty Mon Jan 28 13:44:10 UTC 2019 romstage
starting (log level: 7)...
RTC Init
Starting the Intel FSP (early_init)
CBFS: 'Master Header Locator' located CBFS at [200:200000)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 7940 size cc00
microcode: sig=0x30679 pf=0x1 revision=0x90a
PM1_STS = 0x2100 PM1_CNT = 0x0 GEN_PMCON1 = 0x45008
prev_sleep_state = S5
Configure Default UPD Data
PcdMrcInitSPDAddr1: 0xa0 (default)
PcdMrcInitSPDAddr2: 0xa2 (default)
PcdSataMode: 0x01 (set)
PcdLpssSioEnablePciMode: 0x01 (default)
PcdMrcInitMmioSize: 0x800 (default)
PcdIgdDvmt50PreAlloc: 0x02 (default)
PcdApertureSize: 0x02 (default)
PcdGttSize: 0x02 (default)
SerialDebugPortAddress: 0x3f8 (default)
SerialDebugPortType: 0x01 (default)
PcdMrcDebugMsg: 0x00 (default)
PcdSccEnablePciMode: 0x01 (default)
IgdRenderStandby: 0x00 (default)
TxeUmaEnable: 0x00 (default)
PcdOsSelection: 0x04 (default)
PcdEMMC45DDR50Enabled: 0x01 (default)
PcdEMMC45HS200Enabled: 0x00 (default)
PcdEMMC45RetuneTimerValue: 0x08 (default)
PcdEnableIgd: 0x01 (default)
AutoSelfRefreshEnable: 0x00 (default)
APTaskTimeoutCnt: 0x00 (default)
GTT Size: 2 MB
Tseg Size: 8 MB
Aperture Size: 256 MB
IGD Memory Size: 64 MB
MMIO Size: 2048 MB
MIPI/ISP: Disabled
Sdio: Enabled
Sdcard: Enabled
SATA: Enabled
SIO Dma 0: Enabled
SIO I2C0: Enabled
SIO I2C1: Enabled
SIO I2C2: Enabled
SIO I2C3: Enabled
SIO I2C4: Enabled
SIO I2C5: Enabled
SIO I2C6: Enabled
Azalia: Enabled
SIO Dma1: Enabled
Pwm0: Enabled
Pwm1: Enabled
Hsuart0: Enabled
Hsuart1: Enabled
Spi: Enabled
Lpe: Disabled
eMMC Mode: eMMC 4.5
SATA Mode: AHCI
Xhci: Enabled
-----------------------------------------------------------------------------------------
And then - nothing.
It seems payload is not running.
Currently SeaBIOS is enabled.
My goal it to boot vanilla linux with grub (or grub2) via RS232 console
only.
With the original BIOS I got from vendor, I used knoppix to burn grub on
the SATA disk.
If coreboot is running grub, how should I burn grub ? Is it part of
coreboot image ?
Thank you,
Zvika
[Attachment #5 (text/html)]
<div dir="ltr"><div dir="ltr">Hello,<br><div><br></div><div>I got the following \
output via RS232 console:</div><div>------------------------------------------------------------------------------</div><div><div>coreboot-4.9-539-gde3ace0-dirty \
Mon Jan 28 13:44:10 UTC 2019 romstage starting (log level: 7)...</div><div>RTC \
Init</div><div>Starting the Intel FSP (early_init)</div><div>CBFS: 'Master Header \
Locator' located CBFS at [200:200000)</div><div>CBFS: Locating \
'cpu_microcode_blob.bin'</div><div>CBFS: Found @ offset 7940 size \
cc00</div><div>microcode: sig=0x30679 pf=0x1 revision=0x90a</div><div>PM1_STS = \
0x2100 PM1_CNT = 0x0 GEN_PMCON1 = 0x45008</div><div>prev_sleep_state = \
S5</div><div>Configure Default UPD Data</div><div>PcdMrcInitSPDAddr1: \
0xa0 (default)</div><div>PcdMrcInitSPDAddr2: 0xa2 \
(default)</div><div>PcdSataMode: 0x01 \
(set)</div><div>PcdLpssSioEnablePciMode: 0x01 \
(default)</div><div>PcdMrcInitMmioSize: 0x800 \
(default)</div><div>PcdIgdDvmt50PreAlloc: 0x02 \
(default)</div><div>PcdApertureSize: 0x02 \
(default)</div><div>PcdGttSize: 0x02 \
(default)</div><div>SerialDebugPortAddress: 0x3f8 \
(default)</div><div>SerialDebugPortType: 0x01 \
(default)</div><div>PcdMrcDebugMsg: 0x00 \
(default)</div><div>PcdSccEnablePciMode: 0x01 \
(default)</div><div>IgdRenderStandby: 0x00 \
(default)</div><div>TxeUmaEnable: 0x00 (default)</div><div>PcdOsSelection: \
0x04 (default)</div><div>PcdEMMC45DDR50Enabled: 0x01 \
(default)</div><div>PcdEMMC45HS200Enabled: 0x00 \
(default)</div><div>PcdEMMC45RetuneTimerValue: 0x08 \
(default)</div><div>PcdEnableIgd: 0x01 \
(default)</div><div>AutoSelfRefreshEnable: 0x00 \
(default)</div><div>APTaskTimeoutCnt: 0x00 (default)</div><div>GTT \
Size: 2 MB</div><div>Tseg Size: 8 MB</div><div>Aperture \
Size: 256 MB</div><div>IGD Memory Size: 64 MB</div><div>MMIO Size: \
2048 MB</div><div>MIPI/ISP: Disabled</div><div>Sdio: \
Enabled</div><div>Sdcard: Enabled</div><div>SATA: \
Enabled</div><div>SIO Dma 0: Enabled</div><div>SIO I2C0: \
Enabled</div><div>SIO I2C1: Enabled</div><div>SIO I2C2: \
Enabled</div><div>SIO I2C3: Enabled</div><div>SIO I2C4: \
Enabled</div><div>SIO I2C5: Enabled</div><div>SIO I2C6: \
Enabled</div><div>Azalia: Enabled</div><div>SIO Dma1: \
Enabled</div><div>Pwm0: Enabled</div><div>Pwm1: \
Enabled</div><div>Hsuart0: Enabled</div><div>Hsuart1: \
Enabled</div><div>Spi: Enabled</div><div>Lpe: \
Disabled</div><div>eMMC Mode: eMMC 4.5</div><div>SATA Mode: \
AHCI</div><div>Xhci: \
Enabled</div></div><div>-----------------------------------------------------------------------------------------</div><div>And \
then - nothing. </div><div>It seems payload is not running.</div><div>Currently \
SeaBIOS is enabled. </div><div><br></div><div>My goal it to boot vanilla linux with \
grub (or grub2) via RS232 console only. </div><div>With the original BIOS I got from \
vendor, I used knoppix to burn grub on the SATA disk. </div><div>If coreboot is \
running grub, how should I burn grub ? Is it part of coreboot image \
?</div><div><br></div><div>Thank you,<br></div><div>Zvika </div></div></div>
_______________________________________________
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-leave@coreboot.org
[prev in list] [next in list] [prev in thread] [next in thread]
Configure |
About |
News |
Add a list |
Sponsored by KoreLogic