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List: linuxbios
Subject: Re: [coreboot] Intel EMT/RMT tool with Coreboot
From: Zoran Stojsavljevic <zoran.stojsavljevic () gmail ! com>
Date: 2016-08-28 7:03:47
Message-ID: CAGAf8Lzoq-UOmYV=CGmzQnOtArGONF7YXqu-kTadjP_0NJfEGQ () mail ! gmail ! com
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Hello Mayuri,
I am not mistaken, RMT stands for Rank Margin Tool (related to DDR3/DDR4):
http://www.freepatentsonline.com/7689879.pdf
I am afraid, actually, the fastest/only way for you is to contact INTEL
support.
Good luck with that. You'll certainly need it!? ;-)
Zoran
On Sat, Aug 27, 2016 at 4:18 PM, Mayuri Tendulkar <
mayuri.tendulkar@aricent.com> wrote:
> Hi Team
>
>
>
> I am exploring usage of Intel memory related tools with coreboot for Intel
> BayTrail processors.
>
>
>
> As per their guide, it works on Valley View BIOS with some MRC settings.
>
>
>
> Has anybody explored on this?
>
>
>
> Regards
>
> Mayuri
> "DISCLAIMER: This message is proprietary to Aricent and is intended solely
> for the use of the individual to whom it is addressed. It may contain
> privileged or confidential information and should not be circulated or used
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> this message. Aricent accepts no responsibility for loss or damage arising
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> from virus."
>
> --
> coreboot mailing list: coreboot@coreboot.org
> https://www.coreboot.org/mailman/listinfo/coreboot
>
[Attachment #5 (text/html)]
<div dir="ltr"><div><div><div><div>Hello Mayuri,<br><br></div>I am not mistaken, RMT \
stands for Rank Margin Tool (related to DDR3/DDR4):<br><a \
href="http://www.freepatentsonline.com/7689879.pdf">http://www.freepatentsonline.com/7689879.pdf</a><br><br></div>I \
am afraid, actually, the fastest/only way for you is to contact INTEL \
support.<br><br></div>Good luck with that. You'll certainly need it!? \
;-)<br><br></div>Zoran<br></div><div class="gmail_extra"><br><div \
class="gmail_quote">On Sat, Aug 27, 2016 at 4:18 PM, Mayuri Tendulkar <span \
dir="ltr"><<a href="mailto:mayuri.tendulkar@aricent.com" \
target="_blank">mayuri.tendulkar@aricent.com</a>></span> wrote:<br><blockquote \
class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc \
solid;padding-left:1ex">
<div link="#0563C1" vlink="#954F72" lang="EN-IN">
<div>
<p class="MsoNormal">Hi Team<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">I am exploring usage of Intel memory related tools with coreboot \
for Intel BayTrail processors.<u></u><u></u></p> <p class="MsoNormal"><u></u> \
<u></u></p> <p class="MsoNormal">As per their guide, it works on Valley View BIOS \
with some MRC settings.<u></u><u></u></p> <p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Has anybody explored on this?<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Regards<u></u><u></u></p>
<p class="MsoNormal">Mayuri<u></u><u></u></p>
</div>
"DISCLAIMER: This message is proprietary to Aricent and is intended solely for \
the use of the individual to whom it is addressed. It may contain privileged or \
confidential information and should not be circulated or used for any purpose other \
than for what it is intended. If you have received this message in error, please \
notify the originator immediately. If you are not the intended recipient, you are \
notified that you are strictly prohibited from using, copying, altering, or \
disclosing the contents of this message. Aricent accepts no responsibility for loss \
or damage arising from the use of the information transmitted by this email including \
damage from virus." </div>
<br>--<br>
coreboot mailing list: <a \
href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br> <a \
href="https://www.coreboot.org/mailman/listinfo/coreboot" rel="noreferrer" \
target="_blank">https://www.coreboot.org/<wbr>mailman/listinfo/coreboot</a><br></blockquote></div><br></div>
--
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