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List: linuxbios
Subject: [coreboot] [commit] r6409 - trunk/src/cpu/amd/model_10xxx
From: repository service <svn () coreboot ! org>
Date: 2011-02-28 3:53:48
Message-ID: E1PtuBA-00072r-D2 () ra ! coresystems ! de
[Download RAW message or body]
Author: mjones
Date: Mon Feb 28 04:53:47 2011
New Revision: 6409
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6409
Log:
Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage
handling for Fam 10 in SVI mode.
I don't understand what this was doing nor find docs for these regs
Maybe it was left over from some copy & paste ?
Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Marc Jones <marcj303@gmail.com>
Modified:
trunk/src/cpu/amd/model_10xxx/fidvid.c
Modified: trunk/src/cpu/amd/model_10xxx/fidvid.c
==============================================================================
--- trunk/src/cpu/amd/model_10xxx/fidvid.c Mon Feb 28 04:49:28 2011 (r6408)
+++ trunk/src/cpu/amd/model_10xxx/fidvid.c Mon Feb 28 04:53:47 2011 (r6409)
@@ -394,19 +394,6 @@
} else { /* SVI */
/* set slamVidMode to 1 for SVI */
dword |= VID_SLAM_ON;
-
- u32 dtemp = dword;
-
- /* Program F3xD8[PwrPlanes] according F3xA0[DulaVdd] */
- dword = pci_read_config32(dev, 0xD8);
-
- if (dtemp & DUAL_VDD_BIT)
- dword |= PWR_PLN_ON;
- else
- dword &= PWR_PLN_OFF;
- pci_write_config32(dev, 0xD8, dword);
-
- dword = dtemp;
}
/* set the rest of A0 since we're at it... */
--
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