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List: linuxbios
Subject: [LinuxBIOS] tyan s3970 lspci
From: "Savchenko Mikhail" <Savchenko () altell ! ru>
Date: 2007-05-31 13:12:14
Message-ID: 002d01c7a385$4f1013a0$0401a8c0 () notebook255
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There are lspci and lspci -nnvvv outputs in attachments
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["lspci.txt" (text/plain)]
00:01.0 0604: 1166:0036
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64
Bus: primary=00, secondary=01, subordinate=02, sec-latency=64
I/O behind bridge: 0000a000-0000bfff
Memory behind bridge: ff400000-ff4fffff
Prefetchable memory behind bridge: 00000000fff00000-0000000000000000
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort+ \
<SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
Capabilities: [90] PCI-X bridge device
Secondary Status: 64bit+ 133MHz+ SCD- USC- SCO- SRD- Freq=133MHz
Status: Dev=00:01.0 64bit- 133MHz- SCD- USC- SCO- SRD-
Upstream: Capacity=0 CommitmentLimit=0
Downstream: Capacity=0 CommitmentLimit=0
Capabilities: [a0] HyperTransport: MSI Mapping
Capabilities: [b0] HyperTransport: Slave or Primary Interface
Command: BaseUnitID=1 UnitCnt=3 MastHost- DefDir-
Link Control 0: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0
Link Config 0: MLWI=8bit MLWO=8bit LWI=8bit LWO=8bit
Link Control 1: CFlE- CST- CFE- <LkFail- Init- EOC+ TXO+ <CRCErr=0
Link Config 1: MLWI=8bit MLWO=8bit LWI=N/C LWO=N/C
Revision ID: 0.00
Capabilities: [d8] #0d [0000]
00:02.0 0600: 1166:0205
Subsystem: 1166:0201
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ \
FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64
00:02.1 0101: 1166:0214 (prog-if 8a)
Subsystem: 1166:0214
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64, Cache Line Size: 64 bytes
Region 0: I/O ports at <ignored>
Region 1: I/O ports at <ignored>
Region 2: I/O ports at <ignored>
Region 3: I/O ports at <ignored>
Region 4: I/O ports at ffa0 [size=16]
Capabilities: [b0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00:02.2 0601: 1166:0234
Subsystem: 1166:0230
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ \
FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 0
00:03.0 0c03: 1166:0223 (rev 01) (prog-if 10)
Subsystem: 1166:0223
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ \
FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 10
Region 0: Memory at ff6e8000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at d400 [size=256]
Capabilities: [dc] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Bridge: PM- B3+
00:03.1 0c03: 1166:0223 (rev 01) (prog-if 10)
Subsystem: 1166:0223
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ \
FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 10
Region 0: Memory at ff6e9000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at d800 [size=256]
Capabilities: [dc] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Bridge: PM- B3+
00:03.2 0c03: 1166:0223 (rev 01) (prog-if 20)
Subsystem: 1166:0223
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ \
FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 10
Region 0: Memory at ff6ea000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at e800 [size=256]
Capabilities: [dc] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Bridge: PM- B3+
00:04.0 0200: 8086:1229 (rev 10)
Subsystem: 8086:1040
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64 (2000ns min, 14000ns max), Cache Line Size: 64 \
bytes Interrupt: pin A routed to IRQ 16
Region 0: Memory at ff6e7000 (32-bit, non-prefetchable) [size=4K]
Region 1: I/O ports at ec00 [size=64]
Region 2: Memory at ff6a0000 (32-bit, non-prefetchable) [size=128K]
Capabilities: [dc] Power Management version 2
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=2 PME-
00:06.0 0604: 1166:0130 (rev a3)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64
Bus: primary=00, secondary=03, subordinate=03, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-0000000000000000
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ \
<SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
Capabilities: [90] PCI-X bridge device
Secondary Status: 64bit+ 133MHz+ SCD- USC- SCO- SRD- Freq=133MHz
Status: Dev=00:06.0 64bit- 133MHz- SCD- USC- SCO- SRD-
Upstream: Capacity=0 CommitmentLimit=0
Downstream: Capacity=0 CommitmentLimit=0
Capabilities: [a0] HyperTransport: MSI Mapping
Capabilities: [b0] HyperTransport: Slave or Primary Interface
Command: BaseUnitID=6 UnitCnt=6 MastHost- DefDir-
Link Control 0: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0
Link Config 0: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit
Link Control 1: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0
Link Config 1: MLWI=8bit MLWO=8bit LWI=8bit LWO=8bit
Revision ID: 0.00
00:07.0 0604: 1166:0130 (rev a3)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64
Bus: primary=00, secondary=04, subordinate=04, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: ff500000-ff5fffff
Prefetchable memory behind bridge: 00000000cfe00000-00000000cfe00000
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort+ \
<SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
Capabilities: [90] PCI-X bridge device
Secondary Status: 64bit+ 133MHz+ SCD- USC- SCO- SRD- Freq=133MHz
Status: Dev=00:07.0 64bit- 133MHz- SCD- USC- SCO- SRD-
Upstream: Capacity=0 CommitmentLimit=0
Downstream: Capacity=0 CommitmentLimit=0
Capabilities: [a0] HyperTransport: MSI Mapping
00:08.0 0604: 1166:0132 (rev a3)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 0
Bus: primary=00, secondary=05, subordinate=05, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-0000000000000000
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- \
<SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
Capabilities: [a0] HyperTransport: MSI Mapping
Capabilities: [b0] Express Root Port (Slot-) IRQ 0
Device: Supported: MaxPayload 512 bytes, PhantFunc 0, ExtTag-
Device: Latency L0s <4us, L1 <16us
Device: Errors: Correctable- Non-Fatal- Fatal- Unsupported-
Device: RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
Device: MaxPayload 128 bytes, MaxReadReq 128 bytes
Link: Supported Speed 2.5Gb/s, Width x8, ASPM L0s L1, Port 1
Link: Latency L0s <4us, L1 <16us
Link: ASPM Disabled RCB 128 bytes CommClk- ExtSynch-
Link: Speed 2.5Gb/s, Width x8
Root: Correctable- Non-Fatal- Fatal- PME-
00:09.0 0604: 1166:0132 (rev a3)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 0
Bus: primary=00, secondary=06, subordinate=06, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-0000000000000000
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- \
<SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
Capabilities: [a0] HyperTransport: MSI Mapping
Capabilities: [b0] Express Root Port (Slot-) IRQ 0
Device: Supported: MaxPayload 512 bytes, PhantFunc 0, ExtTag-
Device: Latency L0s <4us, L1 <16us
Device: Errors: Correctable- Non-Fatal- Fatal- Unsupported-
Device: RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
Device: MaxPayload 128 bytes, MaxReadReq 128 bytes
Link: Supported Speed 2.5Gb/s, Width x4, ASPM L0s L1, Port 2
Link: Latency L0s <4us, L1 <16us
Link: ASPM Disabled RCB 128 bytes CommClk- ExtSynch-
Link: Speed 2.5Gb/s, Width x0
Root: Correctable- Non-Fatal- Fatal- PME-
00:0a.0 0604: 1166:0132 (rev a3)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 0
Bus: primary=00, secondary=07, subordinate=07, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-0000000000000000
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- \
<SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
Capabilities: [a0] HyperTransport: MSI Mapping
Capabilities: [b0] Express Root Port (Slot-) IRQ 0
Device: Supported: MaxPayload 512 bytes, PhantFunc 0, ExtTag-
Device: Latency L0s <4us, L1 <16us
Device: Errors: Correctable- Non-Fatal- Fatal- Unsupported-
Device: RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
Device: MaxPayload 128 bytes, MaxReadReq 128 bytes
Link: Supported Speed 2.5Gb/s, Width x8, ASPM L0s L1, Port 3
Link: Latency L0s <4us, L1 <16us
Link: ASPM Disabled RCB 128 bytes CommClk- ExtSynch-
Link: Speed 2.5Gb/s, Width x8
Root: Correctable- Non-Fatal- Fatal- PME-
00:0b.0 0604: 1166:0132 (rev a3)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 0
Bus: primary=00, secondary=08, subordinate=08, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-0000000000000000
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- \
<SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
Capabilities: [a0] HyperTransport: MSI Mapping
Capabilities: [b0] Express Root Port (Slot-) IRQ 0
Device: Supported: MaxPayload 512 bytes, PhantFunc 0, ExtTag-
Device: Latency L0s <4us, L1 <16us
Device: Errors: Correctable- Non-Fatal- Fatal- Unsupported-
Device: RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
Device: MaxPayload 128 bytes, MaxReadReq 128 bytes
Link: Supported Speed 2.5Gb/s, Width x4, ASPM L0s L1, Port 4
Link: Latency L0s <4us, L1 <16us
Link: ASPM Disabled RCB 128 bytes CommClk- ExtSynch-
Link: Speed 2.5Gb/s, Width x0
Root: Correctable- Non-Fatal- Fatal- PME-
00:0c.0 0300: 1002:515e (rev 02)
Subsystem: 1002:515e
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR+ \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64 (2000ns min), Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 11
Region 0: Memory at d8000000 (32-bit, prefetchable) [size=128M]
Region 1: I/O ports at e000 [size=256]
Region 2: Memory at ff6f0000 (32-bit, non-prefetchable) [size=64K]
Expansion ROM at ff6c0000 [disabled] [size=128K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00:18.0 0600: 1022:1100
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Capabilities: [80] HyperTransport: Host or Secondary \
Interface
!!! Possibly incomplete decoding
Command: WarmRst+ DblEnd-
Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0
Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit
Revision ID: 1.02
Capabilities: [a0] HyperTransport: Host or Secondary Interface
!!! Possibly incomplete decoding
Command: WarmRst+ DblEnd-
Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0
Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit
Revision ID: 1.02
Capabilities: [c0] HyperTransport: Host or Secondary Interface
!!! Possibly incomplete decoding
Command: WarmRst+ DblEnd-
Link Control: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0
Link Config: MLWI=16bit MLWO=16bit LWI=N/C LWO=N/C
Revision ID: 1.02
00:18.1 0600: 1022:1101
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR-
00:18.2 0600: 1022:1102
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR-
00:18.3 0600: 1022:1103
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Capabilities: [f0] #0f [0010]
00:19.0 0600: 1022:1100
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Capabilities: [80] HyperTransport: Host or Secondary \
Interface
!!! Possibly incomplete decoding
Command: WarmRst+ DblEnd-
Link Control: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0
Link Config: MLWI=16bit MLWO=16bit LWI=N/C LWO=N/C
Revision ID: 1.02
Capabilities: [a0] HyperTransport: Host or Secondary Interface
!!! Possibly incomplete decoding
Command: WarmRst+ DblEnd-
Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0
Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit
Revision ID: 1.02
Capabilities: [c0] HyperTransport: Host or Secondary Interface
!!! Possibly incomplete decoding
Command: WarmRst+ DblEnd-
Link Control: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0
Link Config: MLWI=16bit MLWO=16bit LWI=N/C LWO=N/C
Revision ID: 1.02
00:19.1 0600: 1022:1101
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR-
00:19.2 0600: 1022:1102
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR-
00:19.3 0600: 1022:1103
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Capabilities: [f0] #0f [0010]
01:0d.0 0604: 1166:0104 (rev c0)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- \
FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64, Cache Line Size: 64 bytes
Bus: primary=01, secondary=02, subordinate=02, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-0000000000000000
Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ \
<SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B-
Capabilities: [90] PCI-X bridge device
Secondary Status: 64bit+ 133MHz+ SCD- USC- SCO- SRD- Freq=conv
Status: Dev=01:0d.0 64bit+ 133MHz+ SCD- USC- SCO- SRD-
Upstream: Capacity=8 CommitmentLimit=8
Downstream: Capacity=8 CommitmentLimit=8
Capabilities: [88] #0d [0000]
01:0e.0 0101: 1166:024b (prog-if 8f)
Subsystem: 1166:024b
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ \
FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64
Interrupt: pin A routed to IRQ 11
Region 0: I/O ports at b080 [size=8]
Region 1: I/O ports at b000 [size=4]
Region 2: I/O ports at ac00 [size=8]
Region 3: I/O ports at a880 [size=4]
Region 4: I/O ports at a800 [size=16]
Region 5: Memory at ff4fe000 (32-bit, non-prefetchable) [size=8K]
Expansion ROM at ff4c0000 [disabled] [size=128K]
Capabilities: [60] PCI-X non-bridge device
Command: DPERE- ERO- RBC=512 OST=8
Status: Dev=01:0e.0 64bit+ 133MHz+ SCD- USC- DC=simple DMMRBC=512 DMOST=8 DMCRS=32 \
RSCEM- 266MHz- 533MHz- Capabilities: [90] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a0] Message Signalled Interrupts: 64bit- Queue=0/0 Enable-
Address: 00000000 Data: 0000
01:0e.1 0101: 1166:024b (prog-if 8f)
Subsystem: 1166:024b
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ \
FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64
Interrupt: pin A routed to IRQ 11
Region 0: I/O ports at bc00 [size=8]
Region 1: I/O ports at b880 [size=4]
Region 2: I/O ports at b800 [size=8]
Region 3: I/O ports at b480 [size=4]
Region 4: I/O ports at b400 [size=16]
Capabilities: [60] PCI-X non-bridge device
Command: DPERE- ERO- RBC=512 OST=8
Status: Dev=01:0e.0 64bit+ 133MHz+ SCD- USC- DC=simple DMMRBC=512 DMOST=8 DMCRS=32 \
RSCEM- 266MHz- 533MHz- Capabilities: [90] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a0] Message Signalled Interrupts: 64bit- Queue=0/0 Enable-
Address: 00000000 Data: 0000
04:04.0 0200: 14e4:166a (rev 03)
Subsystem: 14e4:166a
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ \
FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64 (16000ns min), Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 17
Region 0: Memory at ff5d0000 (64-bit, non-prefetchable) [size=64K]
Region 2: Memory at ff5c0000 (64-bit, non-prefetchable) [size=64K]
Capabilities: [40] PCI-X non-bridge device
Command: DPERE- ERO+ RBC=512 OST=1
Status: Dev=04:04.0 64bit+ 133MHz+ SCD- USC- DC=simple DMMRBC=2048 DMOST=1 DMCRS=16 \
RSCEM- 266MHz- 533MHz- Capabilities: [48] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [50] Vital Product Data
Capabilities: [58] Message Signalled Interrupts: 64bit+ Queue=0/3 Enable-
Address: 0010000000000000 Data: 8000
04:04.1 0200: 14e4:166a (rev 03)
Subsystem: 14e4:166a
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ \
FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- \
<MAbort- >SERR- <PERR- Latency: 64 (16000ns min), Cache Line Size: 64 bytes
Interrupt: pin B routed to IRQ 18
Region 0: Memory at ff5f0000 (64-bit, non-prefetchable) [size=64K]
Region 2: Memory at ff5e0000 (64-bit, non-prefetchable) [size=64K]
Capabilities: [40] PCI-X non-bridge device
Command: DPERE- ERO+ RBC=512 OST=1
Status: Dev=04:04.1 64bit+ 133MHz+ SCD- USC- DC=simple DMMRBC=2048 DMOST=1 DMCRS=16 \
RSCEM- 266MHz- 533MHz- Capabilities: [48] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [50] Vital Product Data
Capabilities: [58] Message Signalled Interrupts: 64bit+ Queue=0/3 Enable-
Address: 0830001208024880 Data: 0200
["dev.txt" (text/plain)]
00:01.0 PCI bridge: Broadcom HT1000 PCI/PCI-X bridge
00:02.0 Host bridge: Broadcom HT1000 Legacy South Bridge
00:02.1 IDE interface: Broadcom HT1000 Legacy IDE controller
00:02.2 ISA bridge: Broadcom HT1000 LPC Bridge
00:03.0 USB Controller: Broadcom HT1000 USB Controller (rev 01)
00:03.1 USB Controller: Broadcom HT1000 USB Controller (rev 01)
00:03.2 USB Controller: Broadcom HT1000 USB Controller (rev 01)
00:04.0 Ethernet controller: Intel Corporation 82557/8/9 [Ethernet Pro 100] (rev 10)
00:06.0 PCI bridge: Broadcom HT1000 PCI-X bridge (rev a3)
00:07.0 PCI bridge: Broadcom HT1000 PCI-X bridge (rev a3)
00:08.0 PCI bridge: Broadcom HT1000 PCI-Express bridge (rev a3)
00:09.0 PCI bridge: Broadcom HT1000 PCI-Express bridge (rev a3)
00:0a.0 PCI bridge: Broadcom HT1000 PCI-Express bridge (rev a3)
00:0b.0 PCI bridge: Broadcom HT1000 PCI-Express bridge (rev a3)
00:0c.0 VGA compatible controller: ATI Technologies Inc ES1000 (rev 02)
00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] \
HyperTransport Technology Configuration 00:18.1 Host bridge: Advanced Micro Devices \
[AMD] K8 [Athlon64/Opteron] Address Map 00:18.2 Host bridge: Advanced Micro Devices \
[AMD] K8 [Athlon64/Opteron] DRAM Controller 00:18.3 Host bridge: Advanced Micro \
Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control 00:19.0 Host bridge: \
Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology \
Configuration 00:19.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] \
Address Map 00:19.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] \
DRAM Controller 00:19.3 Host bridge: Advanced Micro Devices [AMD] K8 \
[Athlon64/Opteron] Miscellaneous Control 01:0d.0 PCI bridge: Broadcom HT1000 \
PCI/PCI-X bridge (rev c0) 01:0e.0 IDE interface: Broadcom BCM5785 (HT1000) PATA/IDE \
Mode 01:0e.1 IDE interface: Broadcom BCM5785 (HT1000) PATA/IDE Mode
04:04.0 Ethernet controller: Broadcom Corporation NetXtreme BCM5780 Gigabit Ethernet \
(rev 03) 04:04.1 Ethernet controller: Broadcom Corporation NetXtreme BCM5780 Gigabit \
Ethernet (rev 03)
--
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