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List: linux1394-devel
Subject: [PATCH 1/2] ieee1394: ohci1394: steps to implement suspend/resume
From: Stefan Richter <stefanr () s5r6 ! in-berlin ! de>
Date: 2006-09-24 9:44:19
Message-ID: tkrat.1d4e8058d938e065 () s5r6 ! in-berlin ! de
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Date: Wed, 6 Sep 2006 14:58:30 +0200 (CEST)
From: Bernhard Kaindl <bk@fsfe.org>
Subject: Re: ohci1394: steps to implement suspend/resume
I did a quick shot on what I described and the appended patch
does the first thing needed for working suspend/resume
in ohci1394 which is HW de- and re-initialisation.
It works with suspend2disk on my Ricoh R5C552 IEEE 1394 Controller
with the 2.6.17 kernel to the extent that if I call dvgrab --interactive
after suspend2disk without unloading ohci1394, it does not lock up
dvgrab with 100% CPU but properly connects to the camera, given
that I first unplug and plug the camera after coming back from
suspend.
I guess that could be fixed by forcing a bus reset in the resume
function.
I cannot test suspend to RAM here at the moment and should
follow the guidelines in Documentation/power/pci.txt also,
so this is rather a quick report than a finished patch and
there are some rough edges:
However, with this patch, I have to unload at least some in-kernel
users of ohci1394 like dv1394 or video1394 before suspending.
Not doing that caused an Oops and a bad tasklet error, probably from
not handling ISO tasklets during suspend/resume properly.
Maybe these can be temporarily cleared or unregistered and
re-registered for suspend/resume with help from the other
layers or from the highlevel 1394 core, but I do not really
know what these do.
But this patch provides a useful base to start from and is
already of much help for people which do not need dv1394
and video1394 or can unload them at least during suspend.
I cannot test function with sbp2 at the moment, but raw1394
seems to work fine.
Signed-off-by: Bernhard Kaindl <bk@fsfe.org>
Update: merge with previous two ohci1394 suspend/resume patches
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
---
Index: linux/drivers/ieee1394/ohci1394.c
===================================================================
--- linux.orig/drivers/ieee1394/ohci1394.c 2006-09-23 15:48:34.000000000 +0200
+++ linux/drivers/ieee1394/ohci1394.c 2006-09-24 09:50:03.000000000 +0200
@@ -3532,6 +3532,9 @@ static void ohci1394_pci_remove(struct p
#ifdef CONFIG_PM
static int ohci1394_pci_resume (struct pci_dev *pdev)
{
+ int err;
+ struct ti_ohci *ohci;
+
/* PowerMac resume code comes first */
#ifdef CONFIG_PPC_PMAC
if (machine_is(powermac)) {
@@ -3546,12 +3549,82 @@ static int ohci1394_pci_resume (struct p
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
- return pci_enable_device(pdev);
+ err = pci_enable_device(pdev);
+ if (err)
+ return err;
+
+ ohci = pci_get_drvdata(pdev);
+ if (!ohci)
+ return -1; /* or which exit status to use? */
+
+ PRINT(KERN_DEBUG, "resume called");
+
+ /* The following lines are copied from ohci1394_pci_probe(): */
+
+ /* Start off with a soft reset, to clear everything to a sane
+ * state. */
+ ohci_soft_reset(ohci);
+
+ /* Now enable LPS, which we need in order to start accessing
+ * most of the registers. In fact, on some cards (ALI M5251),
+ * accessing registers in the SClk domain without LPS enabled
+ * will lock up the machine. Wait 50msec to make sure we have
+ * full link enabled. */
+ reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_LPS);
+
+ /* Disable and clear interrupts */
+ reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff);
+ reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff);
+
+ mdelay(50);
+
+ ohci_initialize(ohci);
+
+ return 0;
}
static int ohci1394_pci_suspend (struct pci_dev *pdev, pm_message_t state)
{
int err;
+ struct ti_ohci *ohci;
+
+ ohci = pci_get_drvdata(pdev);
+ if (!ohci)
+ return -1; /* Not sure if this is the correct return code */
+
+ PRINT(KERN_DEBUG, "suspend called");
+
+ /* clear the async DMA contexts and stop using the controller: */
+ hpsb_bus_reset(ohci->host);
+
+ /* The following calls are from ohci1394_pci_remove(): */
+
+ /* Clear out BUS Options */
+ reg_write(ohci, OHCI1394_ConfigROMhdr, 0);
+ reg_write(ohci, OHCI1394_BusOptions,
+ (reg_read(ohci, OHCI1394_BusOptions) & 0x0000f007) |
+ 0x00ff0000);
+
+ /* Clear interrupt registers */
+ reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff);
+ reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff);
+ reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 0xffffffff);
+ reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 0xffffffff);
+ reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 0xffffffff);
+ reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 0xffffffff);
+
+ /* Disable IRM Contender */
+ set_phy_reg(ohci, 4, ~0xc0 & get_phy_reg(ohci, 4));
+
+ /* Clear link control register */
+ reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff);
+
+ /* Let all other nodes know to ignore us */
+ ohci_devctl(ohci->host, RESET_BUS, LONG_RESET_NO_FORCE_ROOT);
+
+ /* This stops all DMA contexts, disables interrupts,
+ * and clears linkEnable and LPS: */
+ ohci_soft_reset(ohci);
err = pci_save_state(pdev);
if (err)
-------------------------------------------------------------------------
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