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List: linux-usb
Subject: [PATCH v4 07/15] usb: dwc3: Add DWC_usb31 GTXTHRCFG reg fields
From: Thinh Nguyen <Thinh.Nguyen () synopsys ! com>
Date: 2018-01-31 21:16:31
Message-ID: c935200ed22a597be73b4e6a20c28369ac6cfb76.1517428812.git.thinhn () synopsys ! com
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Add new GTXTHRCFG bit field macros for DWC_usb31. The GTXTHRCFG register
fields for DWC_usb31 is as follows:
+-------+--------------------------+-----------------------------------+
| BITS | Name | Description |
+=======+==========================+===================================+
| 31:27 | reserved | |
| 26 | UsbTxPktCntSel | Async ESS transmit packet |
| | | threshold enable |
| 25:21 | UsbTxPktCnt | Async ESS transmit packet |
| | | threshold count |
| 20:16 | UsbMaxTxBurstSize | Async ESS Max transmit burst size |
| 15 | UsbTxThrNumPktSel_HS_Prd | HS high bandwidth periodic |
| | | transmit packet threshold enable |
| 14:13 | UsbTxThrNumPkt_HS_Prd | HS high bandwidth periodic |
| | | transmit packet threshold count |
| 12:11 | reserved | |
| 10 | UsbTxThrNumPktSel_Prd | Periodic ESS transmit packet |
| | | threshold enable |
| 9:5 | UsbTxThrNumPkt_Prd | Periodic ESS transmit packet |
| | | threshold count |
| 4:0 | UsbMaxTxBurstSize_Prd | Max periodic ESS TX burst size |
+-------+--------------------------+-----------------------------------+
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
---
drivers/usb/dwc3/core.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 61c2b78d5809..7d15d92f622a 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -181,6 +181,16 @@
#define DWC31_RXTHRNUMPKT_PRD(n) (((n) & 0x1f) << 5)
#define DWC31_MAXRXBURSTSIZE_PRD(n) ((n) & 0x1f)
+/* Global TX Threshold Configuration Register for DWC_usb31 only */
+#define DWC31_GTXTHRCFG_MAXTXBURSTSIZE(n) (((n) & 0x1f) << 16)
+#define DWC31_GTXTHRCFG_TXPKTCNT(n) (((n) & 0x1f) << 21)
+#define DWC31_GTXTHRCFG_PKTCNTSEL BIT(26)
+#define DWC31_TXTHRNUMPKTSEL_HS_PRD BIT(15)
+#define DWC31_TXTHRNUMPKT_HS_PRD(n) (((n) & 0x3) << 13)
+#define DWC31_TXTHRNUMPKTSEL_PRD BIT(10)
+#define DWC31_TXTHRNUMPKT_PRD(n) (((n) & 0x1f) << 5)
+#define DWC31_MAXTXBURSTSIZE_PRD(n) ((n) & 0x1f)
+
/* Global Configuration Register */
#define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19)
#define DWC3_GCTL_U2RSTECN BIT(16)
--
2.11.0
--
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