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List:       linux-tegra
Subject:    Re: [RESEND][RFC PATCH] irqchip: arm-gic: take gic_lock when updating irq type
From:       Marc Zyngier <marc.zyngier () arm ! com>
Date:       2018-03-26 14:43:56
Message-ID: 713b48b4-e0a2-0c08-01aa-68f8e3af3eda () arm ! com
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Hi Aniruddha,

On 26/03/18 13:02, Aniruddha Banerjee wrote:
> The kernel documentation states that the locking of the irq-chip
> registers should be handled by the irq-chip driver. In the irq-gic,
> the accesses to the irqchip are seemingly not protected and multiple
> writes to SPIs from different irq descriptors do RMW requests without
> taking the irq-chip lock. When multiple irqs call the request_irq at
> the same time, there can be a simultaneous write at the gic
> distributor, leading to a race. Acquire the gic_lock when the
> irq_type is updated.
> 
> Signed-off-by: Aniruddha Banerjee <aniruddhab@nvidia.com>
> ---
>  drivers/irqchip/irq-gic.c | 9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
> index 4c797b43614d..61380f5a2254 100644
> --- a/drivers/irqchip/irq-gic.c
> +++ b/drivers/irqchip/irq-gic.c
> @@ -67,6 +67,8 @@ static void gic_check_cpu_features(void)
>  #define gic_check_cpu_features()	do { } while(0)
>  #endif
>  
> +static DEFINE_RAW_SPINLOCK(irq_controller_lock);
> +
>  union gic_base {
>  	void __iomem *common_base;
>  	void __percpu * __iomem *percpu_base;
> @@ -529,6 +531,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
>  {
>  	void __iomem *base = gic_dist_base(d);
>  	unsigned int gicirq = gic_irq(d);
> +	int ret;
>  
>  	/* Interrupt configuration for SGIs can't be changed */
>  	if (gicirq < 16)
> @@ -539,7 +542,11 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
>  			    type != IRQ_TYPE_EDGE_RISING)
>  		return -EINVAL;
>  
> -	return gic_configure_irq(gicirq, type, base, NULL);
> +	raw_spin_lock(&irq_controller_lock);
> +	ret = gic_configure_irq(gicirq, type, base, NULL);
> +	raw_spin_unlock(&irq_controller_lock);
> +
> +	return ret;
>  }
>  
>  static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu)
> 

You do have a good point here, but it'd be better to put it directly in
the gic_configure_irq() function, fixing both GICv1/2 and v3 in one go.
That would allow the sync_access method to be run outside of the
critical section.

Please post it to LKML and add a Cc stable for it.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...
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