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List:       linux-poweredge
Subject:    Re: PERC 5/i not accepting Write Back Setting
From:       Ogden <lists () darkstatic ! com>
Date:       2011-08-25 5:12:41
Message-ID: 89B389A6-64DF-4E75-8CC5-26A7A7D94EC3 () darkstatic ! com
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On Aug 18, 2011, at 2:14 PM, Jens Heinz wrote:

> I checked, but didn't found any written proof. Since I don't have a H700
> NV we need somebody else on that list to confirm or disprove my
> assumptions. 
> In my opinion NVRAM would be too slow to be used for caching. Hence
> there must be some sort of battery to backup the power for the time of
> transfer from fast cache memory to slower NVRAM. Maybe that battery is
> now significantly smaller (like a coin cell) and even integrated
> somewhere on the cache module, but I still think it is somewhere.
> Assuming that sales people were right, because there is no longer a
> dedicated part as a battery. 
> What I can say for sure is that H800 NV (external controller) does still
> have a battery for its TNVC. 
> 
> Anyway, stick to the setting:
> 
> Adaptive Read Ahead 
> Write Back 
> Disk Cache disabled 
> 
> That is what you should do.  
> 

I am just bumping this in case there is someone on the list that can specify whether \
the H700 NV has a battery cache on hand so I can shut off barrier writing when using \
the XFS filesystem on Linux. 

Thank you

Ogden
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