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List:       linux-pci
Subject:    Re: PCI question (SERR)
From:       Greg KH <greg () kroah ! com>
Date:       2007-04-27 23:42:37
Message-ID: 20070427234237.GA23352 () kroah ! com
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On Fri, Apr 27, 2007 at 11:58:08AM -0700, Stephen Hemminger wrote:
> I am trying to diagnose why 88e8056 works on ASUS motherboard but fails on
> Gigabyte motherboard.  Looking at lspci output, on the Gigagbyte board the
> SERR is disabled on the Host bridge, but is enabled on the Asus.
> 
> 1) Why would that matter?

I don't think it should, but my low-level PCI knowledge is lacking in
areas like this.  Anyone else know?

> 2) Is the Gigabyte BIOS setting this or the pci subsystem.

I think the BIOS is setting it.

> 3) Is it a BIOS bug, or BIOS trying to mask an error:
> 
> 
> Asus:
> 
> 00:00.0 Host bridge: Intel Corporation 82P965/G965 Memory Controller Hub (rev 02)
> 	Subsystem: ASUSTeK Computer Inc. Unknown device 81ea
> 	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
> 	Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
> 	Latency: 0
> 	Capabilities: [e0] Vendor Specific Information
> 00: 86 80 a0 29 06 00 90 20 02 00 00 06 00 00 00 00
> 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 ea 81
> 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00
> 
> Gigabyte:
> 
> 00:00.0 Host bridge: Intel Corporation 82P965/G965 Memory Controller Hub (rev 02)
> 	Subsystem: Giga-byte Technology Unknown device 5000
> 	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
> 	Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
> 	Latency: 0
> 	Capabilities: [e0] Vendor Specific Information
> 00: 86 80 a0 29 06 00 90 20 02 00 00 06 00 00 00 00
> 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 00 50
> 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00

Wait, SERR is disabled on both of these bridges, right?

thanks,

greg k-h
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