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List:       linux-parisc
Subject:    Re: [PATCH v2][RFC] parisc: Change L1_CACHE_BYTES to 16
From:       John David Anglin <dave.anglin () bell ! net>
Date:       2015-09-27 16:46:40
Message-ID: 87729342-A3F6-453F-BA6F-EF3C096AA92A () bell ! net
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On 2015-09-27, at 12:17 PM, James Bottomley wrote:

> What makes you think we need SMP_CACHE_BYTES to be different from
> L1_CACHE_BYTES?  No other architecture does this.  The theory that gives
> us two defines was that some SMP systems would arbitrate for memory at
> geater than cache line offsets but, in practise, none does because
> that's the level at which the cross CPU memory ownership model works
> anyway.

I was just keeping the values we had before.  Changing to the new L1_CACHE_BYTES
value probably needs testing.

Dave
--
John David Anglin	dave.anglin@bell.net



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