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List:       linux-fpga
Subject:    RE: [PATCH v2 3/5] spi: spi-altera-dfl: support n5010 feature revision
From:       matthew.gerlach () linux ! intel ! com
Date:       2021-06-29 22:30:41
Message-ID: alpine.DEB.2.22.394.2106291511040.1279832 () rhweight-WRK1
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On Tue, 29 Jun 2021, Wu, Hao wrote:

>> On 28/06/2021 19.39, Moritz Fischer wrote:
>>> On Fri, Jun 25, 2021 at 09:42:11AM +0200, Martin Hundebøll wrote:
>>>> From: Martin Hundebøll<mhu@silicom.dk>
>>>>
>>>> The Max10 BMC on the Silicom n5010 PAC is slightly different than the
>>>> existing BMC's, so use a dedicated feature revision detect it.
>>>>
>>>> Signed-off-by: Martin Hundebøll<mhu@silicom.dk>
>>>> ---
>>>>
>>>> Changes since v1:
>>>>   * use feature revision from struct dfl_device instead of reading it
>>>>     from io-mem
>>>>
>>>>   drivers/spi/spi-altera-dfl.c | 15 +++++++++++++--
>>>>   1 file changed, 13 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/spi/spi-altera-dfl.c b/drivers/spi/spi-altera-dfl.c
>>>> index 3e32e4fe5895..f6cf7c8d9dac 100644
>>>> --- a/drivers/spi/spi-altera-dfl.c
>>>> +++ b/drivers/spi/spi-altera-dfl.c
>>>> @@ -111,6 +111,13 @@ static struct spi_board_info m10_bmc_info = {
>>>>   	.chip_select = 0,
>>>>   };
>>>>
>>>> +static struct spi_board_info m10_n5010_bmc_info = {
>>>> +	.modalias = "m10-n5010",
>>>> +	.max_speed_hz = 12500000,
>>>> +	.bus_num = 0,
>>>> +	.chip_select = 0,
>>>> +};
>>> Is there no way to query the mc for version info?
>>
>> Do you mean reading the BMC variant (i.e. n5010 / d5005 / n3000) from a
>> register?
>>
>> Not in a uniform way across the different boards that I'm aware of. But
>> isn't this what the DFL feature revision is meant for?
>
> If this is used to distinguish different boards, then revision (4bits?) may not

On the one hand, the revision is being used to distinguish the board. 
More precisely, the feature ID id determining the actual hardware 
involved, altera-spi connected to a particular indirect register mailbox. 
This is a different feature id used by the n3000 which has a different 
indirect register mailbox with a NIOS hanshake.  So in this case the revision
is being used to specify remote end of the SPI connection, d5005 BMC vs. 
n5010 BMC.

I think in this case 4 bits is enough.  We've only had two instances 
of this hardware in 5 years.  Certainly any future instances of this
hardware should have a register describing the remote end of the SPI 
connection.  This hardware change would then require a new feature id.

> be enough. New version DFH may be able to resolve this limitation, but it
> is always encouraged to have its own method to tell if possible, not depending
> on DFH, it makes this IP easy to be reused in non DFL case.
>
> Thanks
> Hao
>
>>
>> // Martin
>

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