[prev in list] [next in list] [prev in thread] [next in thread] 

List:       linux-fpga
Subject:    WG: Linux hang
From:       "Siegmund, Jan" <jan.siegmund0 () hm ! edu>
Date:       2017-12-07 11:00:45
Message-ID: 71bcb4759caa437dba81be27fc611239 () hm ! edu
[Download RAW message or body]

Hi all,
does anybody have an idea for the following problem?

* FPGA is programmed using an overlay
* FPGA writes to SDRAM via the FPGA2SDRAM-bridge
* Linux hangs and the watchdog resets the board (the FPGA stays programmed)
* After the reset and boot, the FPGA is reprogrammed using the same overlay
* Now, the FPGA can write to the SDRAM without a problem

The environment:

*Board:   DE0-NANO-SoC
*U-Boot: 2017.11
*Kernel:  4.14.0-rc7 (review-v4.14-rc7-non-dt-support-v5.1 branch)

The overlay:

/dts-v1/;
/plugin/;

/ {
        fragment@0 {
                target-path = "/soc/base_fpga_region";
                #address-cells = <1>;
                #size-cells = <1>;
                __overlay__ {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        fpga-bridges = <&fpga_bridge0 &fpga_bridge1>;
                        firmware-name = "foo_base.rbf";

                        fpga-bridge@ffc25080 {
                                compatible = "altr,socfpga-fpga2sdram-bridge";
                                reg = <0xffc25080 0x4>;
                                bridge-enable = <1>;
                        };

                        foo@ff200000 {
                                compatible= "altr,bar";
                                interrupt-parent = <&intc>;
                                interrupts = <0 40 4>;
                        };

                };
        };
};

Thanks--
To unsubscribe from this list: send the line "unsubscribe linux-fpga" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
[prev in list] [next in list] [prev in thread] [next in thread]