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List:       linux-fpga
Subject:    Re: [PATCH] fpga manager: cyclone-ps-spi: don't bitswap reversed bitstream
From:       Joshua A Clayton <joshua.clayton () uniwest ! com>
Date:       2017-05-17 20:58:49
Message-ID: 10036848.m85ieInfYG () jclayton-pc
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On Wednesday, May 17, 2017 10:33:49 PM PDT Anatolij Gustschin wrote:
> Hi,
> 
> On Wed, 17 May 2017 07:50:25 -0700
> joshua.clayton@uniwest.com joshua.clayton@uniwest.com wrote:
> ...
> 
> >>  	while (fw_data < fw_data_end) {
> >>  	
> >>  		int ret;
> >> 
> >> -		size_t stride = min(fw_data_end - fw_data, SZ_4K);
> >> +		size_t stride = min_t(size_t, fw_data_end - fw_data, SZ_4K);
> >> +
> >> +		if (!(conf->info_flags & FPGA_MGR_SPI_BITSTREAM_LSB_FIRST))
> >> +			rev_buf((char *)fw_data, stride);
> >
> >Now  testing... I think the logic here is inverted.
> >if FPGA_MGR_SPI_BITSTREAM_LSB_FIRST (which is the native format for
> >cyclone, but not for Arria), reverse the bits.
> 
> When this flag is _not_ set (default), then the rev_buf() is invoked,
> like in you driver version in patch v9.
> 
> Maybe the meaning of FPGA_MGR_SPI_BITSTREAM_LSB_FIRST is not clear?

Exactly! I was confused between the rbf bitstream, which is I guess not
lsb first, and the chip, which wants it fed that way.

> You do not have to set this flag, only users who post-processed their
> bitstreams after creation must set this flag (some users do not want
> to bitreverse bitstream data while sending in the driver, so they
> reverse the bit order in the bitstream files. This flag is for such
> users.

...and there is one other scenario in which it would not be needed:
If the SPI device supports LSB_FIRST operations, bit reversal can be done by 
the SPI chipset, rather than the fpga manager.
> 
> Arria 10 expects LSB first for each data byte, too (like Cyclone-V
> and Stratix-V). There is no difference.
>
Thanks for that clarification.  
> Thanks,
> 
> Anatolij

-- 
Joshua A Clayton, Software Engineer
UniWest - 122 S 4th Avenue, Pasco WA 99301
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