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List:       linux-edac
Subject:    Re: [PATCH v4 2/2] x86/MCE/AMD: Don't report L1 BTB MCA errors on some Family 17h models
From:       Thomas Gleixner <tglx () linutronix ! de>
Date:       2019-03-27 19:37:04
Message-ID: alpine.DEB.2.21.1903272036350.1789 () nanos ! tec ! linutronix ! de
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On Wed, 27 Mar 2019, Borislav Petkov wrote:

> On Wed, Mar 27, 2019 at 08:19:57PM +0100, Thomas Gleixner wrote:
> > > Cc: <stable@vger.kernel.org> # 5.0.x: c95b323dcd35: x86/MCE/AMD: Turn off \
> > > MC4_MISC thresholding on all family 0x15 models
> > 
> > What is this supposed to tell us?
> 
> That's stable speak from Documentation/process/stable-kernel-rules.rst
> for patch prerequisites:
> 
> "Additionally, some patches submitted via :ref:`option_1` may have additional
> patch prerequisites which can be cherry-picked. This can be specified in the
> following format in the sign-off area:
> 
> .. code-block:: none
> 
> Cc: <stable@vger.kernel.org> # 3.3.x: a1f84a3: sched: Check for idle
> Cc: <stable@vger.kernel.org> # 3.3.x: 1b9508f: sched: Rate-limit newidle
> Cc: <stable@vger.kernel.org> # 3.3.x: fd21073: sched: Fix affinity logic
> Cc: <stable@vger.kernel.org> # 3.3.x
> Signed-off-by: Ingo Molnar <mingo@elte.hu>"

Cute. Wasn't aware of that.

Thanks for the education!

       tglx


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